Formal Verification Engineer

AMD
Markham, Vancouver, Calgary, Ottawa
Workplace: HybridFull timeFunction: Software EngineeringEducation: bachelorsSkills: ["Technical leadership","Mentorship","Collaboration","Problem-solving","Communication"]

Develop formal functional and security verification for high-speed semiconductor IPs, including I/O virtualization and PCIe and inter-chiplet connections. Create and execute formal verification plans, write and debug properties, optimize formal runtime, and report progress. Provide technical leadership for a small team by coordinating verification activities, training junior engineers, improving verification setups, and addressing complex formal problems. Collaborate across architecture, RTL design, DV, and silicon teams from concept through tapeout.

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FursaFursa
AMD
AMD
1 month ago

Formal Verification Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live

Job Summary

Develop formal functional and security verification for high-speed semiconductor IPs, including I/O virtualization and PCIe and inter-chiplet connections. Create and execute formal verification plans, write and debug properties, optimize formal runtime, and report progress. Provide technical leadership for a small team by coordinating verification activities, training junior engineers, improving verification setups, and addressing complex formal problems. Collaborate across architecture, RTL design, DV, and silicon teams from concept through tapeout.
Location: Markham, Vancouver, Calgary, Ottawa
Workplace: Hybrid
Employment Type: Full time
Job Function: Software Engineering

Key Responsibilities

  • •Collaborate with architects and designers to understand design intents.
  • •Create and execute formal verification plans for design blocks.
  • •Write and debug properties to verify design behavior, analyze signatures, and drive issue resolution.
  • •Optimize runtime using formal techniques and collect/report verification status and progress.
  • •Lead and coordinate verification activities for a small team, including training/coaching junior engineers and improving formal verification setups based on reviews and metrics.

Key Requirements

  • •BS (or higher) in Electronics/Electrical or Computer Engineering (desired).
  • •Hands-on experience with formal property verification (FPV) and sequential equivalence checking (SEC/SEQ/SLEC), and/or academic formal methods.
  • •Expertise in a formal property language (SVA preferred), abstraction techniques, and formal sign-off with commercial formal tools (e.g., VC-Formal, JasperGold, Questa Formal).
  • •Experience verifying complex IPs using advanced formal methodologies, including I/O virtualization and PCIe Root Complex/Endpoint.
  • •Familiarity with high-speed protocols such as PCIe, SATA, USB, and AXI, plus AI-assisted formal verification (AI-based property generation, proof optimization, coverage analysis).
Experience:SemiconductorsASIC/FPGAFormal verificationHigh-speed I/OSecurity verification
Education:Bachelor's in Electronics/Electrical or Computer Engineering
Skills:Technical leadershipMentorshipCollaborationProblem-solvingCommunication
Languages:English
Tech Stack:Formal verificationFormal property verificationSVAAI-based formal verificationAI-assisted property generationVC-FormalJasperGoldQuesta FormalFPVSECSEQSLECASICFPGAPCIeSATAUSBAXIInter-chiplet interconnectsI/O virtualization

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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Glassdoor: 3.9
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