PDK Engineer

Intel
Bengaluru
Workplace: OnsiteFull timeFunction: Software EngineeringExperience: 8+ yearsSkills: ["Debugging","Analytical thinking","Problem-solving","Attention to quality","Cross-functional communication"]

Develop, validate, support, and optimize DRC runsets for advanced semiconductor process nodes. Translate process design rules into accurate physical verification checks, build and validate complex rule decks, and create test cases and regression suites to ensure coverage and correctness. Debug rule deck issues, improve quality and runtime efficiency, and automate runset development and deployment using tools and scripting. Collaborate with process, CAD/EDA, and design teams to refine requirements and resolve production user issues.

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FursaFursa
Intel
Intel
1 day ago

PDK Engineer

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Last checked: 8 hours agoStatus: Live

Job Summary

Develop, validate, support, and optimize DRC runsets for advanced semiconductor process nodes. Translate process design rules into accurate physical verification checks, build and validate complex rule decks, and create test cases and regression suites to ensure coverage and correctness. Debug rule deck issues, improve quality and runtime efficiency, and automate runset development and deployment using tools and scripting. Collaborate with process, CAD/EDA, and design teams to refine requirements and resolve production user issues.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Software Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop, maintain, and support DRC runsets/rule decks for advanced semiconductor process nodes.
  • •Translate process design rules into accurate and efficient physical verification checks, including complex geometric, connectivity, density, and process-specific rules.
  • •Create comprehensive test cases and validation methodologies to confirm rule deck coverage, correctness, and functionality.
  • •Debug DRC rule deck issues and resolve customer/user-reported problems in a timely manner.
  • •Automate runset development, validation, regression, and deployment processes to improve quality, runtime efficiency, scalability, and usability.

Key Requirements

  • •10+ years with a Bachelor’s (or 8+ years with a Master’s) in Electronics, VLSI, Computer Engineering, or a related field.
  • •Strong experience developing DRC rule decks/runsets for semiconductor technologies.
  • •Hands-on expertise with physical verification tools such as Siemens Calibre, Synopsys ICV, and/or Cadence Pegasus.
  • •Strong debugging and analytical skills for writing, debugging, and optimizing DRC checks and rule implementations.
  • •Programming/scripting experience (e.g., Python, Perl, Tcl, Shell) and ability to create validation test cases and regression suites.
Experience:8+ yearsSemiconductorVLSIEDAPhysical verification
Education:
Skills:DebuggingAnalytical thinkingProblem-solvingAttention to qualityCross-functional communication
Tech Stack:Siemens CalibreSynopsys ICVCadence PegasusCadence VirtuosoCalibre DRVIC WorkBenchPythonPerlTclShell scriptingAI-based toolsDRC runsetsRule decksPhysical verification

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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