Arago

3 weeks ago

Senior ASIC Architect

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 7 hours agoStatus: Live

Job Summary

Define and realize next-generation compute architectures for a multiphysics AI hardware platform, owning the system-level vision from concept through tape-out. Lead system modeling, specifications, and implementation handoff while mentoring cross-functional teams across RTL design, functional verification, and physical integration. Partner with software, packaging, and system integration to ensure scalability, performance, and reliability, and evaluate new architectural directions using performance/cost modeling.

Location: Paris

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Carry the top-level architecture of the multiphysics compute platform, including processing elements, interconnects, memory subsystems, and system-level control.
•Own the architectural vision from concept through tape-out, driving system modeling, specification, and implementation handoff across engineering teams.
•Work and mentor cross-functional hardware teams across RTL design, functional verification, and physical integration to maintain technical direction and execution quality.
•Collaborate with software, packaging, and system integration teams to ensure architectural choices support scalability, performance, and reliability.
•Evaluate new architectural directions, develop performance and cost models, and guide prototyping to de-risk future generations.

Pay and Benefits

Equity and Bonus:Equity

Perks:EquityAnnual BonusHealth InsurancePensionLearning BudgetPaid Leave

Key Requirements

•Proven experience architecting complex, high-performance digital systems such as multicore processors, vector engines, and domain-specific accelerators.
•Deep expertise in computer architecture, including memory hierarchies, interconnects, cache coherence, instruction set design, and performance-power-area trade-offs.
•Hands-on experience designing and integrating compute-intensive blocks like ALUs, SIMD pipelines, systolic arrays, and custom datapaths.
•Experience leading full ASIC development cycles from architectural concept and modeling through RTL implementation, functional verification, physical design, and tape-out.
•Experience with advanced system integration and packaging technologies such as HBM, chiplets, and 2.5D/3D integration.

Skills:LeadershipCommunicationMentoring

Tech Stack:ASICComputer architectureMulticore processorsVector enginesDomain-specific acceleratorsMemory hierarchiesInterconnectsCache coherenceInstruction set designALUsSIMDSystolic arraysDatapathsRTLFunctional verificationPhysical designTape-outHBMChiplets2.5D integration

Company Brief

Arago

Develops energy-efficient photonic AI processors (codenamed “JEF”) that use light-based computation to drastically reduce energy consumption for AI workloads, targeting data centers and large-scale inference deployments.

Industry: Deep Tech

Company Size: Small (11 to 50 employees)

Growth: Early Stage Startup

Funding: Seed

Headquarters: Paris, France

Founded: 2024

Glassdoor: 3.9

Website Glassdoor

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Arago

3 weeks ago

Senior ASIC Architect

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 7 hours agoStatus: Live

Job Summary

Location: Paris

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Carry the top-level architecture of the multiphysics compute platform, including processing elements, interconnects, memory subsystems, and system-level control.
•Own the architectural vision from concept through tape-out, driving system modeling, specification, and implementation handoff across engineering teams.
•Work and mentor cross-functional hardware teams across RTL design, functional verification, and physical integration to maintain technical direction and execution quality.
•Collaborate with software, packaging, and system integration teams to ensure architectural choices support scalability, performance, and reliability.
•Evaluate new architectural directions, develop performance and cost models, and guide prototyping to de-risk future generations.

Pay and Benefits

Equity and Bonus:Equity

Perks:EquityAnnual BonusHealth InsurancePensionLearning BudgetPaid Leave

Key Requirements

•Proven experience architecting complex, high-performance digital systems such as multicore processors, vector engines, and domain-specific accelerators.
•Deep expertise in computer architecture, including memory hierarchies, interconnects, cache coherence, instruction set design, and performance-power-area trade-offs.
•Hands-on experience designing and integrating compute-intensive blocks like ALUs, SIMD pipelines, systolic arrays, and custom datapaths.
•Experience leading full ASIC development cycles from architectural concept and modeling through RTL implementation, functional verification, physical design, and tape-out.
•Experience with advanced system integration and packaging technologies such as HBM, chiplets, and 2.5D/3D integration.

Skills:LeadershipCommunicationMentoring

Company Brief

Arago

Industry: Deep Tech

Company Size: Small (11 to 50 employees)

Growth: Early Stage Startup

Funding: Seed

Headquarters: Paris, France

Founded: 2024

Glassdoor: 3.9

Website Glassdoor