Principal Analog Design Engineer

Neurophos
Austin
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 10+ yearsEducation: mastersSkills: ["Communication","Problem-solving","Collaboration","Teamwork","Leadership"]

Lead design and development of high-speed analog blocks for a photonic AI platform, from architecture to tape-out, interfacing with custom silicon photonics and digital teams. You will own transistor-level circuit design, linearity, noise, and signal integrity in GHz CMOS processes, drive full-custom schematic capture and layout, and collaborate to optimize electro-optic interfaces for high-performance optical computing.

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FursaFursa
Neurophos
Neurophos
8 months ago

Principal Analog Design Engineer

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Last checked: 1 hour agoStatus: Live

Job Summary

Lead design and development of high-speed analog blocks for a photonic AI platform, from architecture to tape-out, interfacing with custom silicon photonics and digital teams. You will own transistor-level circuit design, linearity, noise, and signal integrity in GHz CMOS processes, drive full-custom schematic capture and layout, and collaborate to optimize electro-optic interfaces for high-performance optical computing.
Location: Austin
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Design, simulate, and verify high-speed analog circuits, such as drivers and transimpedance amplifiers, in deep sub-micron CMOS technologies.
  • •Define architecture and specifications for electronic blocks based on system-level requirements.
  • •Perform full-custom schematic capture, advanced analog simulations, and complete physical layout, including DRC/LVS, of critical analog blocks using Cadence Virtuoso.
  • •Ensure rigorous signal integrity and power integrity across all high-speed interconnects.
  • •Collaborate closely with the Photonics and Digital teams to optimize the electro-optic interface, maximizing performance across the combination of disciplines.

Pay and Benefits

Equity and Bonus:Equity
Perks:Equity

Key Requirements

  • •MS or PhD in Electrical Engineering
  • •10+ years of professional experience in full-custom analog integrated circuit design
  • •5+ years of dedicated experience in GHz-speed RF or GHz-speed broadband analog design
  • •Demonstrated expert proficiency in the Cadence tool suite, specifically Virtuoso schematic, simulation, and custom layout
  • •Deep understanding of semiconductor device physics, linearity, noise analysis, and high-frequency circuit theory
Experience:10+ yearsPhotonicAISemiconductor
Education:Master's in Electrical Engineering
Skills:CommunicationProblem-solvingCollaborationTeamworkLeadership
Tech Stack:Cadence VirtuosoCMOSDRC/LVSPost-layout extractionSpectre RFEMXHFSS

Company Brief

Neurophos
Develops metamaterial-based photonic optical processing units (OPUs) to deliver high-performance, energy-efficient AI inference chips for datacenters, aiming to scale photonic compute to exaflop levels.
Industry: Deep Tech
Company Size: Small (11 to 50 employees)
Growth: Growth Stage Startup
Funding: Series A
Headquarters: Austin, United States
Founded: 2020
WebsiteLinkedIn