Systems Software Engineer, NPU Management Interface

FuriosaAI
Seoul
Full timeFunction: Software EngineeringSkills: ["Spec compliance","Debugging","Interoperability","Validation"]

Design and develop firmware/software for an NPU Management Interface that enables out-of-band communication between Host/BMC and NPU devices. Implement and validate MCTP, PLDM, and custom MI commands, plus device-management features over SMBus/I²C, I3C, PCIe VDM, or sideband channels. Integrate MI into NPU firmware for telemetry, health/error reporting, and debug info, and lead spec-driven compliance testing and system-level validation.

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FursaFursa
FuriosaAI
FuriosaAI
1 week ago

Systems Software Engineer, NPU Management Interface

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 14 hours agoStatus: Live

Job Summary

Design and develop firmware/software for an NPU Management Interface that enables out-of-band communication between Host/BMC and NPU devices. Implement and validate MCTP, PLDM, and custom MI commands, plus device-management features over SMBus/I²C, I3C, PCIe VDM, or sideband channels. Integrate MI into NPU firmware for telemetry, health/error reporting, and debug info, and lead spec-driven compliance testing and system-level validation.
Location: Seoul
Employment Type: Full time
Job Function: Software Engineering

Key Responsibilities

  • •Design and develop NPU Management Interface firmware/software enabling communication between Host/BMC and NPU devices
  • •Implement and maintain MCTP, PLDM, and custom MI command handling for out-of-band management, monitoring, and control
  • •Develop device-management features over SMBus/I²C, I3C, PCIe VDM, or custom sideband channels
  • •Integrate MI functionality into NPU firmware for health/error reporting, thermal/power telemetry, runtime metrics, utilization, and debug information
  • •Perform spec-driven design, validation, and protocol compliance/regression/interoperability testing, including bring-up and rack-scale integration support

Key Requirements

  • •Strong proficiency in embedded C or C++
  • •Experience developing firmware for NPU/accelerator, GPU, or SoC
  • •Understanding of management protocols including MCTP and PLDM
  • •Experience with low-level interfaces such as SMBus/I²C, I3C, SPI, and PCIe
  • •Ability to interpret complex protocol specifications and implement them robustly
Skills:Spec complianceDebuggingInteroperabilityValidation
Languages:English
Tech Stack:CC++Embedded firmwareNPU management interfaceMCTPPLDMSMBusI²CI3CSPIPCIe VDMCustom sideband channelsLogic analyzersRTOSOpenBMCRedfishIPMIFirmware update mechanismsTelemetry

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
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