SoC Digital Design Engineer, Multimedia Lab

Build scalable video codec SoC hardware for advanced video encoding and processing, contributing to early architecture definition (NoC/CPU/NPU/ISP/Codec) and PPA evaluation. Implement RTL in Verilog/SystemVerilog, run lint and CDC/RDC checks, and support low-power design using clock/power gating and UPF. Collaborate across verification and backend/mid-end teams for synthesis, SDC generation, static timing analysis, coverage closure, and power optimization.