Design Verification Engineer

AMD
Bengaluru
Workplace: OnsiteFull timeINR 3,338,160 - 4,768,800 annuallyFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: []

Verify pre-silicon Infinity Fabric transport-layer designs by developing and enhancing SystemVerilog/UVM-based testbenches for client, server, graphics, and semi-custom interconnects. Partner with architects, RTL designers, performance engineers, and post-silicon validation to build deep expertise in Infinity Fabric architecture, improve testbench verification components, and execute metric-focused test plans. Mentor junior engineers and contribute to verification environment and infrastructure development.

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FursaFursa
AMD
AMD
2 hours ago

Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live

Job Summary

Verify pre-silicon Infinity Fabric transport-layer designs by developing and enhancing SystemVerilog/UVM-based testbenches for client, server, graphics, and semi-custom interconnects. Partner with architects, RTL designers, performance engineers, and post-silicon validation to build deep expertise in Infinity Fabric architecture, improve testbench verification components, and execute metric-focused test plans. Mentor junior engineers and contribute to verification environment and infrastructure development.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Develop and enhance System Verilog/UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects.
  • •Collaborate with architects, RTL designers, performance engineers, and post-silicon validation engineers to build expertise in Infinity Fabric architecture.
  • •Understand testbench architecture and build expertise in testbench verification components.
  • •Create and execute verification test plans in a metric-focused environment.
  • •Mentor junior engineers.

Pay and Benefits

Salary: INR 3,338,160 - 4,768,800 annually

Key Requirements

  • •Proven experience verifying complex design blocks at the IP or SoC level using System Verilog/UVM or related technologies.
  • •Ability to create and execute test plans in collaboration with design and verification colleagues in a metric-focused environment.
  • •Proficiency in IP level ASIC verification.
  • •Experience architecting and developing complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar.
  • •Bachelor’s or master’s degree in Electronics, Electrical, or Computer engineering.
Education:Master's in Electronics or Electrical or Computer engineering
Languages:En-us
Tech Stack:System VerilogUVMPerlRubyMakeRTLASICSoCInfinity FabricTestbenchTest planningTestbench verification componentsFormal verification

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn