Staff Engineer, PCIE ASIC Validation

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 8+ yearsEducation: bachelorsSkills: ["Communication","Teamwork","Root-cause analysis","Debugging","Positive attitude"]

Own pre-silicon SoC validation for PCIe/LPDDR/ONFI subsystems, partnering with Design, SOC C, and FW teams to define verification plans and drive validation execution. Lead hands-on FPGA-based prototyping and emulation using Xilinx FPGA flows (Vivado, Protocompiler) and VCS simulations, including RTL debugging when required. Use HAPS hardware for PCIe bring-up debugging and apply strong root-cause analysis across RTL/hardware layers.

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FursaFursa
Micron Technology
Micron Technology
3 weeks ago

Staff Engineer, PCIE ASIC Validation

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Source: Company careers pageValidated by: Fursa AI
Last checked: 17 hours agoStatus: Live

Job Summary

Own pre-silicon SoC validation for PCIe/LPDDR/ONFI subsystems, partnering with Design, SOC C, and FW teams to define verification plans and drive validation execution. Lead hands-on FPGA-based prototyping and emulation using Xilinx FPGA flows (Vivado, Protocompiler) and VCS simulations, including RTL debugging when required. Use HAPS hardware for PCIe bring-up debugging and apply strong root-cause analysis across RTL/hardware layers.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Sr. Manager level

Key Responsibilities

  • •Complete hands-on Xilinx FPGA flow, Vivado flow, and Protocompiler tool flow for SoC deployment on pre-silicon platforms like HAPS.
  • •Own overall SoC verification planning and execution for PCIe/LPDDR/ONFI subsystems in partnership with SOC C, AE, and FW teams.
  • •Develop and perform processor-based SoC prototyping and emulation using C/FW/AE flows; run SoC C simulations for test understanding and debug using VCS.
  • •Review SoC verification plans and create/understand PCIe/LPDDR/ONFI validation plans, aligning with SOC C, AE, and FW teams.
  • •Support PCIe/LP bring-up and debug with overseas teams; write Verilog RTL when required and perform hardware/RTL root-cause analysis.

Key Requirements

  • •Bachelors/Masters or equivalent engineering experience.
  • •At least 8 years of processor-based SoC and hands-on HAPS implementation experience.
  • •Strong practical experience with Xilinx FPGA debug and Chipscope flow, including Vivado flow.
  • •Thorough knowledge of HAPS and Protocompiler tool flow, plus ability to create PCIe/LPDDR/ONFI validation plans with SOC C, AE, and FW teams.
  • •Strong Verilog coding skills and experience running SoC C-based simulations for test understanding and debug using VCS.
Experience:8+ years
Education:Bachelor's
Skills:CommunicationTeamworkRoot-cause analysisDebuggingPositive attitude
Tech Stack:Xilinx FPGAVivadoProtocompilerHAPSVCSVerilogRTLChipscopePCIeNVMeLPDDRONFIAXIPythonPerlTCL

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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