IO and Mixed Signal Layout Design Engineer

Broadcom
India
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5-8 yearsEducation: bachelorsSkills: ["Communication","Collaboration","Self-motivation","Independent work","Project leadership"]

Design full custom layouts for I/O libraries and analog mixed-signal IPs in planar and FinFET technologies. Own end-to-end deliverables by making critical floor-planning decisions, meeting placement/routing requirements, and performing comprehensive layout verification for quality and compliance. Collaborate across teams across multiple sites, adapt to new methodologies, and support physical design flows such as LEF generation and PnR, including debugging using DRC/LVS/ANT/ERC/DFM and related checks.

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FursaFursa
Broadcom
Broadcom
4 days ago

IO and Mixed Signal Layout Design Engineer

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Last checked: 6 hours agoStatus: Live

Job Summary

Design full custom layouts for I/O libraries and analog mixed-signal IPs in planar and FinFET technologies. Own end-to-end deliverables by making critical floor-planning decisions, meeting placement/routing requirements, and performing comprehensive layout verification for quality and compliance. Collaborate across teams across multiple sites, adapt to new methodologies, and support physical design flows such as LEF generation and PnR, including debugging using DRC/LVS/ANT/ERC/DFM and related checks.
Location: India
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Design full custom layouts for I/O libraries and analog mixed-signal IPs in planar and FinFET technologies.
  • •Drive floor-planning decisions to achieve optimal placement and routing that meets design requirements and performance metrics.
  • •Perform comprehensive layout verification to ensure high quality and compliance.
  • •Own end-to-end deliverables with quality within the schedule.
  • •Adapt to new methodologies and communicate effectively with teams across all sites.

Key Requirements

  • •B.Tech/M.Tech in Electronics or Electrical engineering with 5–8 years of experience.
  • •Hands-on experience developing and verifying I/O libraries and analog mixed-signal IPs.
  • •Strong understanding of planar and FinFET layouts and process technology.
  • •Knowledge of full-chip concepts including IO frame and pitch requirements, power planning, and IO segment rules.
  • •Proficiency with Cadence Virtuoso Layout and Siemens CALIBRE, including layout verification and debugging (DRC/LVS/ANT/ERC/DFM, LPE, PERC, EM, IR).
Experience:5-8 years
Education:Bachelor's in Electronics/Electrical engineering
Skills:CommunicationCollaborationSelf-motivationIndependent workProject leadership
Tech Stack:Cadence Virtuoso Layout suiteSiemens CALIBREDRCLVSANTERCDFMLPEPERCEMIRLEFPnRSKILLScript ProgrammingPlanarFinFET

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn