Network On Chip IP automation engineer
Shanghai
Workplace: OnsiteFull timeCNY 407,680 - 582,400 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: mastersSkills: ["SystemVerilog","UVM","Formal verification","Testbench","DV signoff","English"]Join the China CF IP team to design and verify advanced Control Fabric IP for AMD SOCs. You will develop block-level verification plans, build testbenches with SystemVerilog/UVM/Formal methods, create reusable DV IP, and support SOC-level verification and IP enablement while collaborating across teams in Shanghai.

