Sr Digital Design Engineer

Micron Technology
Boise
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 4+ yearsEducation: mastersSkills: ["Communication","Problem-solving","Teamwork"]

Design and deliver RTL for complex DRAM digital and mixed-signal blocks, taking work through the RTL-to-GDS flow. Own front-end quality checks (linting, CDC/RDC, synthesis, timing constraints, and timing closure), then collaborate with architecture, verification, and physical design teams to optimize PPA and meet product specifications. Improve RTL design methodologies and automation to increase efficiency and time-to-market while driving robust timing and power outcomes across operating scenarios.

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FursaFursa
Micron Technology
Micron Technology
4 weeks ago

Sr Digital Design Engineer

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Last checked: 18 hours agoStatus: Live

Job Summary

Design and deliver RTL for complex DRAM digital and mixed-signal blocks, taking work through the RTL-to-GDS flow. Own front-end quality checks (linting, CDC/RDC, synthesis, timing constraints, and timing closure), then collaborate with architecture, verification, and physical design teams to optimize PPA and meet product specifications. Improve RTL design methodologies and automation to increase efficiency and time-to-market while driving robust timing and power outcomes across operating scenarios.
Location: Boise
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks aligned to product specifications and performance targets.
  • •Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure.
  • •Collaborate with architecture, verification, and physical design teams to optimize PPA and overall design quality.
  • •Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios.
  • •Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market.

Pay and Benefits

Perks:Health InsuranceDentalVisionPaid Leave

Key Requirements

  • •Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years of experience in digital ASIC/RTL design.
  • •Proven experience developing RTL for complex digital designs from specification through implementation handoff.
  • •Strong knowledge of ASIC front-end flows including RTL design, functional verification, logic synthesis, CDC/RDC analysis, and static timing analysis (STA).
  • •Experience developing and maintaining design constraints (SDC) including clocks, timing exceptions, I/O constraints, and multi-mode multi-corner timing scenarios.
  • •Proficiency with Verilog/SystemVerilog and industry-standard simulation tools.
Experience:4+ yearsASICRTLSemiconductorDRAMMixed-signal
Education:Master's in Electrical Engineering
Skills:CommunicationProblem-solvingTeamwork
Tech Stack:RTL designRTL-to-GDSDRAMASICDigital designMixed-signalVerilogSystemVerilogLogic synthesisStatic timing analysis (STA)Timing closureTiming constraints (SDC)CDC/RDC analysisMulti-mode multi-corner (MMMC)UPFLow-power designPPA optimizationPower optimizationLintingSimulation tools

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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