Hardware - Senior Design Verification Engineer

FuriosaAI
Seoul
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Communication","Written communication","Verbal communication","Collaboration","Problem-solving"]

Own block and system-level design verification for AI hardware, defining verification strategies, plans, and closure metrics. Build and maintain test plans, harnesses, and test sequences using SystemVerilog/UVM, collaborating with Design to debug and root-cause functional failures. Work across Design, Model, Emulation, and Silicon Validation to ensure high design quality, coverage, and code coverage while driving the verification cycle to successful closure.

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FursaFursa
FuriosaAI
FuriosaAI
2 weeks ago

Hardware - Senior Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 55 minutes agoStatus: Live

Job Summary

Own block and system-level design verification for AI hardware, defining verification strategies, plans, and closure metrics. Build and maintain test plans, harnesses, and test sequences using SystemVerilog/UVM, collaborating with Design to debug and root-cause functional failures. Work across Design, Model, Emulation, and Silicon Validation to ensure high design quality, coverage, and code coverage while driving the verification cycle to successful closure.
Location: Seoul
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Define, plan, and implement block and system level verification strategies.
  • •Write and review test plans; develop test harnesses and test sequences.
  • •Drive design verification to closure by meeting defined verification metrics for test plan, functional coverage, and code coverage.
  • •Collaborate with the Design team to debug, root-cause, and resolve functional failures.
  • •Coordinate with cross-functional teams (Design, Model, Emulation, Silicon Validation) to ensure high design quality standards.

Key Requirements

  • •Bachelor's degree in Electrical Engineering, Computer Science, or a related technical field.
  • •5+ years of experience in block and system level verification using SystemVerilog/UVM-based methodologies.
  • •Proficiency with Electronic Design Automation (EDA) tools and scripting (Python, Perl, Shell) for verification tools/flows.
  • •Experience architecting and deploying design verification infrastructure, running the full verification cycle from planning to closure.
Experience:5+ yearsHardwareSemiconductorsAI infrastructureDesign verificationEDASystemVerilogUVM
Education:Bachelor's
Skills:CommunicationWritten communicationVerbal communicationCollaborationProblem-solving
Languages:English
Tech Stack:SystemVerilogUVMPythonPerlShellEDACocotbPCIeUCIeUALinkEthernetARMRISC-V

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
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