System Verification Co-Design Engineer - Speed and Rel
NVIDIA
Santa Clara
Workplace: HybridFull timeUSD 136,000 - 264,500 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 4+ yearsEducation: mastersSkills: ["Cross-functional collaboration","Debugging","Data-driven problem solving","Judgment on automation risk"]Develop and verify system-level speed features through pre- and post-silicon bring-up, correlating silicon behavior with timing simulations and design expectations. Partner with architects and hardware/firmware/software, process/reliability, and operations teams to translate architectural requirements into verification coverage, close the loop with actionable debug feedback, and improve margin optimization. Build automation tools and apply AI/LLM-assisted workflows to accelerate characterization and debug cycles.

