Hardware - Design Verification Engineer

FuriosaAI
Seoul
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: bachelorsSkills: ["Communication"]

Own the design verification lifecycle for block/IP/sub-system/SoC components at Furiosa. Define and execute verification plans, build UVM-based test benches, and develop functional tests to meet coverage and verification metrics. Drive closure, investigate and resolve functional failures with the Design team, and collaborate with Model, Emulation, and Silicon validation teams to ensure the highest design quality before silicon validation.

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FursaFursa
FuriosaAI
FuriosaAI
2 weeks ago

Hardware - Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live

Job Summary

Own the design verification lifecycle for block/IP/sub-system/SoC components at Furiosa. Define and execute verification plans, build UVM-based test benches, and develop functional tests to meet coverage and verification metrics. Drive closure, investigate and resolve functional failures with the Design team, and collaborate with Model, Emulation, and Silicon validation teams to ensure the highest design quality before silicon validation.
Location: Seoul
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Define and implement block/IP/SoC verification plans and build verification test benches for verification at block/IP/sub-system/SoC level.
  • •Develop functional tests based on the verification test plan.
  • •Drive design verification to closure using defined verification metrics across the test plan, functional coverage, and code coverage.
  • •Debug, root-cause, and resolve functional failures in the design in partnership with the Design team.
  • •Collaborate with cross-functional teams (Design, Model, Emulation, and Silicon validation) to ensure high design quality.

Key Requirements

  • •Bachelor’s degree in Electrical Engineering, Computer Science, or a related technical field.
  • •3+ years of block/IP/sub-system and/or SoC verification experience using SystemVerilog/UVM methodologies.
  • •Experience with EDA tools and scripting (Python, TCL, Perl, Shell) to build verification tools and flows.
  • •Experience architecting and implementing design verification infrastructure and executing the full verification cycle.
  • •Ability to build functional tests based on a verification test plan.
Experience:3+ years
Education:Bachelor's in Electrical Engineering, Computer Science or other technically related fields
Skills:Communication
Languages:English
Tech Stack:SystemVerilogUVMEDA toolsPythonTCLPerlShellChiselPCIeUCIeDDRARMRISC-VVerification test benchesFunctional coverageCode coverage

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
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