Package Design Engineer

Broadcom
San Jose, Austin
Workplace: OnsiteFull time141,300 - 226,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 12+ yearsEducation: mastersSkills: ["Self-management","Organization","Team collaboration"]

Experienced IC package-design engineer for flip-chip BGA packages delivering high-speed SerDes and high-power ASIC packages. You’ll lead design across SI/PI, manufacturability, reliability, and thermal aspects, collaborate with a global R&D team on AI/HPC/5G products, perform physical layout, and drive efficiency through automation and documentation. On-site in multiple U.S. locations with cross-team coordination.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Broadcom
Broadcom
6 months ago

Package Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 6 days agoStatus: Live

Job Summary

Experienced IC package-design engineer for flip-chip BGA packages delivering high-speed SerDes and high-power ASIC packages. You’ll lead design across SI/PI, manufacturability, reliability, and thermal aspects, collaborate with a global R&D team on AI/HPC/5G products, perform physical layout, and drive efficiency through automation and documentation. On-site in multiple U.S. locations with cross-team coordination.
Location: San Jose, Austin
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts
  • •Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.
  • •Schedule, prioritize, & track your work across 2+ projects simultaneously
  • •General flip-chip BGA package design & engineering
  • •Project management and customer interface for your design projects

Pay and Benefits

Salary: 141,300 - 226,000 annually
Equity and Bonus:Equity
Perks:MedicalDentalVision401kEsppPaid LeavePaid HolidaysEap

Key Requirements

  • •BSEE or similar field and 12+ years’ experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 10+ years’ work experience
  • •Knowledge of package-level signal integrity and power integrity
  • •Cadence APD (Allegro package designer) experience is preferred. Equivalent tool is OK
  • •Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers
  • •Preferred candidates will also have 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest
Experience:12+ yearsSemiconductorsIC packagingFlip-chipSerDes
Education:Master's in Electrical Engineering
Skills:Self-managementOrganizationTeam collaboration
Languages:English
Tech Stack:Cadence APDAllegroCadence SKILLFlip-chipBGASerDesDDRHBMCadence

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn