Staff Silicon Design Verification Engineer (PCIe)

AMD
Cork, Dublin
Workplace: HybridFull timeEUR 58,380 - 83,400 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 7+ yearsSkills: ["Communication","Mentoring","Leadership","Problem-solving","Cross-functional collaboration"]

Verify next-generation PCIe controller subsystem designs for future AMD SoCs powering AI training/inference, gaming consoles, servers, PCs, graphics cards, and VR. Own verification execution end-to-end from test plan through signoff, including coverage-driven random/directed testing and formal verification. Build UVM-based testbench components and libraries using SystemVerilog, conduct code reviews, and provide technical leadership and mentorship.

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FursaFursa
AMD
AMD
3 hours ago

Staff Silicon Design Verification Engineer (PCIe)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Verify next-generation PCIe controller subsystem designs for future AMD SoCs powering AI training/inference, gaming consoles, servers, PCs, graphics cards, and VR. Own verification execution end-to-end from test plan through signoff, including coverage-driven random/directed testing and formal verification. Build UVM-based testbench components and libraries using SystemVerilog, conduct code reviews, and provide technical leadership and mentorship.
Location: Cork, Dublin
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Execute PCIe Controller verification from test plan through verification signoff.
  • •Collaborate with architects and designers to understand IP features and requirements.
  • •Write/implement/review test plans using coverage-driven random and directed testing, plus formal verification.
  • •Own aspects of the verification flow from coverage convergence to sign-off closure for subsystem interoperability features.
  • •Build UVM-based testbench components and develop test/sequence libraries; conduct code reviews and provide technical leadership.

Pay and Benefits

Salary: EUR 58,380 - 83,400 annually

Key Requirements

  • •Bachelors or Masters degree in Electronics/Computer/Electrical Engineering with 7+ years of relevant DV experience.
  • •Expert in SystemVerilog and UVM, with proven experience verifying commercially successful IPs, subsystems, and/or SoCs.
  • •Proficiency in object-oriented programming and scripting (Ruby, Python, Perl), plus low-level programming languages.
  • •Strong knowledge of standard bus/interface protocols including AXI, AHB, AMBA, OCP, and PIPE.
  • •Experience with Low Power verification and UPF flow is highly desirable.
Experience:7+ years
Education:
Skills:CommunicationMentoringLeadershipProblem-solvingCross-functional collaboration
Languages:En-us
Tech Stack:PCI ExpressSATAUSBEthernetHyperTransportDDRAXIAHBAMBAOCPPIPESystemVerilogUVMUPFFormal verificationPerlRubyPythonMakefileShell

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn