Senior CPU RTL Design Engineer

Intel
Austin, Phoenix
Workplace: HybridFull timeUSD 141,910 - 269,100 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 7+ yearsEducation: bachelorsSkills: ["Ownership","Collaboration","Communication","Critical thinking","Bias for action"]

Shape next-generation Intel processors by defining, developing, and optimizing microarchitectural features. Build high-quality RTL designs, drive power/performance/area/timing improvements, and ensure design integrity for physical implementation. Partner with architecture, verification, physical design, and SoC integration teams to validate RTL, document microarchitectural specifications, and resolve failing tests—delivering CPU technologies used by millions.

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FursaFursa
Intel
Intel
22 hours ago

Senior CPU RTL Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 3 hours agoStatus: Live

Job Summary

Shape next-generation Intel processors by defining, developing, and optimizing microarchitectural features. Build high-quality RTL designs, drive power/performance/area/timing improvements, and ensure design integrity for physical implementation. Partner with architecture, verification, physical design, and SoC integration teams to validate RTL, document microarchitectural specifications, and resolve failing tests—delivering CPU technologies used by millions.
Location: Austin, Phoenix
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop and optimize CPU logic design, RTL coding, and simulation.
  • •Contribute to defining CPU architecture and microarchitecture features.
  • •Write RTL and optimize power, performance, area, and timing goals.
  • •Ensure design integrity for physical implementation using effective strategies, tools, and methods.
  • •Review verification plans, resolve failing RTL tests, and document microarchitectural specifications (MAS) for CPU features.

Pay and Benefits

Salary: USD 141,910 - 269,100 annually
Equity and Bonus:Equity
Perks:Health InsuranceRetirementPaid LeaveEquity

Key Requirements

  • •7+ years of relevant RTL design experience using SystemVerilog with hardware modeling and logic debug environments.
  • •Experience applying energy-efficient/low-power logic design methods for high-frequency optimization.
  • •Experience with clock-domain crossing (CDC) and power-aware design.
  • •3+ years of experience with scripting languages such as TCL, Perl, or Python.
  • •Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or related STEM; or a Master’s degree with 5+ years of experience.
Experience:7+ years
Education:Bachelor's in Electrical/Computer Engineering, Computer science or related STEM degree
Skills:OwnershipCollaborationCommunicationCritical thinkingBias for action
Tech Stack:RTLSystem VerilogSimulationTCLPerlPythonUPFStatic timing analysisLint checksPower managementDynamic voltage and frequency scalingClock-domain crossing (CDC)Energy-efficient/low-power designX86 assembly languageSystem architecture

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
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