STAFF ENG-HBM-LAYOUT

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 8-15 yearsSkills: ["Leadership","Detail oriented","Problem-solving","Communication"]

Design and develop critical layout and co-optimization objectives for mixed-signal custom digital blocks and full-chip integration support within the HBM team. Build and tape out PWF reticles design, engage with Scribe Design for packaging requirements, and validate TSV design collaboration across HIG-HBM teams. Own DFMEA for advanced packaging steps, perform physical verification (LVS/DRC/Antenna), and drive on-time, high-quality block-level layout delivery while coordinating multiple projects globally.

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FursaFursa
Micron Technology
Micron Technology
3 weeks ago

STAFF ENG-HBM-LAYOUT

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Source: Company careers pageValidated by: Fursa AI
Last checked: 16 hours agoStatus: Live

Job Summary

Design and develop critical layout and co-optimization objectives for mixed-signal custom digital blocks and full-chip integration support within the HBM team. Build and tape out PWF reticles design, engage with Scribe Design for packaging requirements, and validate TSV design collaboration across HIG-HBM teams. Own DFMEA for advanced packaging steps, perform physical verification (LVS/DRC/Antenna), and drive on-time, high-quality block-level layout delivery while coordinating multiple projects globally.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Design and develop critical layout and co-optimization objectives for mixed-signal custom digital blocks and full-chip integration support.
  • •Build and tapeout PWF reticles design, including creation and maintenance of DFMEA for advanced packaging process steps.
  • •Engage with Scribe Design to capture advanced packaging requirements and review TSV design engagement across HIG-HBM DTPCO teams (electrical, thermal, mechanical).
  • •Perform layout verification (LVS/DRC/Antenna), execute quality checks, and maintain documentation for on-time delivery of block-level layouts.
  • •Plan and execute multiple layout projects, delegate work, guide junior team members, and communicate effectively with global engineering teams to ensure project success.

Key Requirements

  • •8 to 15 years of experience in analog/custom layout design in advanced CMOS process nodes (Planar, FinFET).
  • •Expertise with Cadence VLE/VXL and Mentor Graphic Calibre for DRC/LVS.
  • •Hands-on experience creating layouts for critical blocks (e.g., Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier).
  • •Hands-on experience in reticle development and full chip verification.
  • •Ability to automate or use AI features to accelerate fast and efficient project execution.
Experience:8-15 years
Education:
Skills:LeadershipDetail orientedProblem-solvingCommunication
Tech Stack:Cadence VLECadence VXLMentor Graphic CalibreDRCLVSAntennaDFMEAScribe DesignPWFTSV

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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