ASIC Design Verification Engineer | UVM | Exp. 8+ years
Cisco
Bengaluru
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 7+ yearsEducation: bachelorsSkills: ["UVM","SystemVerilog","Perl","Python"]Join Cisco's Common Hardware Group to architect and verify complex ASICs for data center and networking hardware. You will design DV environments, develop test plans and infrastructure from scratch, and collaborate with designers, architects, and software teams through post-silicon bring-up to ensure high RTL quality and complete verification coverage.

