DFT Engineer

Texas Instruments
Bengaluru
Workplace: OnsiteFull timeFunction: OtherEducation: bachelorsSkills: []

Develop and execute DFT architecture and scan insertion strategies for low-cost MCUs, then implement and validate ATPG test patterns targeting automotive-grade fault coverage. Design and deploy Memory BIST (MBIST) across SoC designs, ensure DFT rule compliance from RTL to tape-out, and debug ATPG/scan/GLS violations. Perform DFT sign-off checks and build automation scripts (Tcl, Perl, Python) to improve DFT flow efficiency and best practices.

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FursaFursa
Texas Instruments
Texas Instruments
3 months ago

DFT Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 15 hours agoStatus: Live
Reposted: similar role first listed 3 months ago

Job Summary

Develop and execute DFT architecture and scan insertion strategies for low-cost MCUs, then implement and validate ATPG test patterns targeting automotive-grade fault coverage. Design and deploy Memory BIST (MBIST) across SoC designs, ensure DFT rule compliance from RTL to tape-out, and debug ATPG/scan/GLS violations. Perform DFT sign-off checks and build automation scripts (Tcl, Perl, Python) to improve DFT flow efficiency and best practices.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Seniority: Mid level

Key Responsibilities

  • •Develop and execute DFT architecture and scan insertion strategies for low-cost MCUs.
  • •Implement and validate ATPG test patterns to achieve automotive-grade fault coverage.
  • •Design and deploy Memory BIST (MBIST) solutions for embedded memories across SoC designs.
  • •Ensure DFT rule compliance throughout the design flow from RTL to tape-out and perform DFT sign-off checks.
  • •Debug and resolve complex ATPG, scan, and Gate-Level Simulation (GLS) violations; automate DFT flows with Tcl, Perl, and Python scripts.

Key Requirements

  • •Experience with scan compression techniques (e.g., Modus EDT/IJTAG).
  • •Familiarity with IEEE 1149.1 (JTAG) and IEEE 1500 standards.
  • •Exposure to low-power DFT methodologies such as clock gating and power domain testing.
Experience:SemiconductorsMCUsSilicon design
Education:Bachelor's
Languages:US
Tech Stack:EDA toolsDFTATPGGLSTclPerlPythonJTAGIEEE 1149.1IEEE 1500Modus EDTIJTAGMemory BISTMBISTRTL

Company Brief

Texas Instruments
Designs and manufactures semiconductors and analog chips used in industrial, automotive, personal electronics, communications, and enterprise systems. It is one of the world’s largest semiconductor companies, with a broad portfolio of embedded processing and power products.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Dallas, United States
Founded: 1930
WebsiteLinkedIn