Sr. Physical Design CAD Engineer

AMD
Austin
Workplace: HybridFull timeUSD 156,100 - 267,600 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Troubleshooting","Communication","Collaboration","Ownership","Problem-solving"]

Develop and maintain AMD’s physical design CAD flows for AI, HPC, CPU, GPU, and SoC programs. Deploy and support industry-standard EDA tools and methodologies (including Synopsys and Cadence) to improve place-and-route, timing closure, power optimization, and design convergence. Build validation and regression infrastructure, evaluate new vendor tool capabilities, and use automation and AI-driven workflows to reduce cycle time and increase productivity.

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FursaFursa
AMD
AMD
4 days ago

Sr. Physical Design CAD Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Develop and maintain AMD’s physical design CAD flows for AI, HPC, CPU, GPU, and SoC programs. Deploy and support industry-standard EDA tools and methodologies (including Synopsys and Cadence) to improve place-and-route, timing closure, power optimization, and design convergence. Build validation and regression infrastructure, evaluate new vendor tool capabilities, and use automation and AI-driven workflows to reduce cycle time and increase productivity.
Location: Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop, maintain, and enhance physical design CAD flows supporting AI, HPC, CPU, GPU, and SoC programs.
  • •Deploy and support industry-standard EDA tools and methodologies across multiple design projects.
  • •Develop solutions for place-and-route, timing closure, power optimization, and design convergence.
  • •Debug and optimize physical design challenges across power, performance, and area (PPA); build validation environments, test suites, and regression infrastructure.
  • •Evaluate and integrate new EDA tool capabilities, partner with design teams and EDA vendors (Synopsys, Cadence), and improve CAD infrastructure, automation frameworks, and engineering workflows using AI-driven approaches.

Pay and Benefits

Salary: USD 156,100 - 267,600 annually

Key Requirements

  • •Strong experience with physical design CAD flow development and physical design implementation.
  • •Hands-on expertise with Synopsys Fusion Compiler, Cadence Innovus, and PrimeTime.
  • •Experience with physical verification, extraction tools (StarRC or equivalent), and timing signoff with deep PPA (power/performance/area) understanding.
  • •Strong TCL and Python scripting skills for automation and tool development.
  • •Ability to debug and solve complex physical design flow and methodology issues; experience with EDA vendors (Synopsys/Cadence) is required.
Education:Bachelor's
Skills:TroubleshootingCommunicationCollaborationOwnershipProblem-solving
Tech Stack:Synopsys IC Compiler IISynopsys Fusion CompilerPrimeTimeCadence InnovusStarRCTCLPythonAIMachine learning

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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