NVIDIA

3 months ago

Senior Multi‑GPU Signal Processing and System Architecture Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Senior engineer on NVIDIA’s Aerial Omniverse Digital Twin team responsible for designing and implementing real‑time GPU signal‑processing pipelines to apply multi‑antenna channels to OFDM signals across large multi‑GPU systems, enabling scalable 5G/6G network simulations with NVLink/NVSwitch interconnects. Focus is on low-latency, high‑fidelity emulation, end‑to‑end pipeline orchestration, and system scalability.

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Architecture & Urban Planning

Seniority: Sr. Manager level

Key Responsibilities

•Design and implement GPU kernels that apply time‑varying, multi‑antenna channels to OFDM signals under hard real‑time deadlines.
•Architect the inter‑cell data‑flow layer to compress, transport, and consume information for interference modeling within NVLink and NIC budgets at scale.
•Collaborate with propagation engine and RAN stack teams to orchestrate end‑to‑end simulation pipeline and synchronize propagation updates, channel application, and stack execution across hundreds or thousands of GPUs.
•Assess design and implementation trade‑offs between physical fidelity, latency, and system scalability.
•Publish impactful results on GPU‑accelerated numerical workloads or real‑time system design.

Pay and Benefits

Salary: USD 200,000 - 322,000 annually

Equity and Bonus:Equity

Perks:Equity

Key Requirements

•PhD in high‑performance computing, computer architecture, signal processing, or wireless communications (or equivalent experience).
•12+ years of proven experience.
•Proficiency in CUDA kernel design with attention to memory hierarchy, register pressure, and HBM bandwidth planning, with a track record of writing production‑quality GPU code that meets hard real‑time deadlines.
•Demonstrated ability to build and reason about data flows across multi‑device GPU systems (NVLink, NIC/RDMA) with explicit bandwidth and latency accounting.
•Working knowledge of OFDM signal processing and the 5G NR physical layer, sufficient to implement and validate a channel‑emulation pipeline.

Experience:12+ yearsHigh‑performance computingGPU computingCUDA5G/6G

Education:PhD / Doctorate in Computer ScienceUnknown

Skills:CUDAGPUNVLinkOFDM5G6GReal-timeHBMRANBeamformingChannel emulation

Tech Stack:CUDANVLinkNVSwitchHBMGPUOFDM5G NR

Company Brief

NVIDIA

Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor

Loading job details...

Preparing the role view and application actions.

NVIDIA

3 months ago

Senior Multi‑GPU Signal Processing and System Architecture Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Architecture & Urban Planning

Seniority: Sr. Manager level

Key Responsibilities

•Design and implement GPU kernels that apply time‑varying, multi‑antenna channels to OFDM signals under hard real‑time deadlines.
•Architect the inter‑cell data‑flow layer to compress, transport, and consume information for interference modeling within NVLink and NIC budgets at scale.
•Collaborate with propagation engine and RAN stack teams to orchestrate end‑to‑end simulation pipeline and synchronize propagation updates, channel application, and stack execution across hundreds or thousands of GPUs.
•Assess design and implementation trade‑offs between physical fidelity, latency, and system scalability.
•Publish impactful results on GPU‑accelerated numerical workloads or real‑time system design.

Pay and Benefits

Salary: USD 200,000 - 322,000 annually

Equity and Bonus:Equity

Perks:Equity

Key Requirements

•PhD in high‑performance computing, computer architecture, signal processing, or wireless communications (or equivalent experience).
•12+ years of proven experience.
•Proficiency in CUDA kernel design with attention to memory hierarchy, register pressure, and HBM bandwidth planning, with a track record of writing production‑quality GPU code that meets hard real‑time deadlines.
•Demonstrated ability to build and reason about data flows across multi‑device GPU systems (NVLink, NIC/RDMA) with explicit bandwidth and latency accounting.
•Working knowledge of OFDM signal processing and the 5G NR physical layer, sufficient to implement and validate a channel‑emulation pipeline.

Experience:12+ yearsHigh‑performance computingGPU computingCUDA5G/6G

Education:PhD / Doctorate in Computer ScienceUnknown

Skills:CUDAGPUNVLinkOFDM5G6GReal-timeHBMRANBeamformingChannel emulation

Tech Stack:CUDANVLinkNVSwitchHBMGPUOFDM5G NR

Company Brief

NVIDIA

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor