Staff/ Principal Engineer STPG Product Engineering - Probe

Micron Technology
Singapore
Workplace: OnsiteFull timeFunction: Communications, PR & CommunitySkills: ["Root-cause analysis","Cross-functional communication","Structured problem-solving","Collaboration"]

Own probe strategy and silicon learning at wafer test across pre-silicon design-to-probe staging, first-silicon bring-up, qualification, and high-volume manufacturing. Define probe coverage intent, limits, and guard-bands based on silicon behavior, translating product risk into robust, manufacturable probe strategies. Partner with Design, DFT, DV, Process Integration, Backend Test, and Reliability to drive yield, quality, and test-cost improvements, and leverage probe data for AI/ML-driven optimization.

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FursaFursa
Micron Technology
Micron Technology
1 month ago

Staff/ Principal Engineer STPG Product Engineering - Probe

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Source: Company careers pageValidated by: Fursa AI
Last checked: 18 hours agoStatus: Live

Job Summary

Own probe strategy and silicon learning at wafer test across pre-silicon design-to-probe staging, first-silicon bring-up, qualification, and high-volume manufacturing. Define probe coverage intent, limits, and guard-bands based on silicon behavior, translating product risk into robust, manufacturable probe strategies. Partner with Design, DFT, DV, Process Integration, Backend Test, and Reliability to drive yield, quality, and test-cost improvements, and leverage probe data for AI/ML-driven optimization.
Location: Singapore
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Mid level

Key Responsibilities

  • •Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard-bands.
  • •Release and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives are met without unnecessary test overhead.
  • •Drive design-to-probe staging and DFT readiness by partnering with Design, DFT, and DV to influence test hooks, observability, redundancy, and trim structures.
  • •Support first-silicon bring-up and device characterization, correlating early silicon behavior with probe results to validate coverage intent and accelerate yield ramp.
  • •Enable yield, quality, and reliability outcomes via wafer-level learning, bin definitions, failure-mode analysis, and AI/ML-driven probe, smart sampling, and test optimization.

Key Requirements

  • •Bachelor’s, Master’s degree, or PhD in Electrical/Electronics Engineering, Computer Engineering, Semiconductor Physics, or a related field.
  • •Strong fundamentals in semiconductor devices, wafer test, and product engineering.
  • •Demonstrated ability to use silicon behavior and characterization data to make informed probe, yield, and coverage decisions.
  • •Experience or strong interest in silicon learning, device behavior, yield mechanisms, DFT intent, or design-to-manufacturing integration.
  • •Strong analytical and root-cause analysis skills, with effective communication across global cross-functional teams.
Education:
Skills:Root-cause analysisCross-functional communicationStructured problem-solvingCollaboration
Tech Stack:Wafer testSilicon characterizationDFTParametric behaviorYield analysisFailure-mode analysisWLSAI/MLPredictive probeSmart sampling

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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