Formal Verification Engineer

AMD
United States
Workplace: HybridFull timeUSD 126,700 - 217,200 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 8+ yearsEducation: bachelorsSkills: []

Drive formal verification for AMD’s Infinity Fabric configurable switches and die-to-die interconnect across complex hardware designs. Develop verification strategies using VC Formal and/or JasperGold, write and debug SystemVerilog Assertions, and improve proof convergence with abstraction and assume-guarantee reasoning. Collaborate with RTL designers and architects to build verification plans that blend formal and simulation, build reusable formal infrastructure, and mentor junior engineers while pushing “formal-first/shift-left” practices.

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FursaFursa
AMD
AMD
1 day ago

Formal Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 10 hours agoStatus: Live
Reposted: similar role first listed 3 weeks ago

Job Summary

Drive formal verification for AMD’s Infinity Fabric configurable switches and die-to-die interconnect across complex hardware designs. Develop verification strategies using VC Formal and/or JasperGold, write and debug SystemVerilog Assertions, and improve proof convergence with abstraction and assume-guarantee reasoning. Collaborate with RTL designers and architects to build verification plans that blend formal and simulation, build reusable formal infrastructure, and mentor junior engineers while pushing “formal-first/shift-left” practices.
Location: United States
Workplace: Hybrid
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Develop and execute formal verification strategies using VC Formal and/or JasperGold for FPV, connectivity checking (CC), register verification (FRV), and sequential equivalence checking (SEQ).
  • •Write, review, and debug SystemVerilog Assertions (SVA) including assumptions, assertions, and cover properties.
  • •Drive convergence on formal proofs using abstraction techniques, complexity reduction, and assume-guarantee reasoning.
  • •Collaborate with RTL designers and architects to define verification plans that combine formal methods with simulation-based approaches.
  • •Develop reusable formal verification infrastructure and mentor junior engineers in formal verification techniques and best practices.

Pay and Benefits

Salary: USD 126,700 - 217,200 annually

Key Requirements

  • •Minimum 8+ years of experience in design verification with a strong focus on formal verification.
  • •Hands-on experience with VC Formal (Synopsys) and/or JasperGold (Cadence).
  • •Strong proficiency in SystemVerilog Assertions (SVA) and formal property specification.
  • •Experience with formal verification applications including FPV, connectivity checking, register verification, equivalence checking, and coverage analysis.
  • •Bachelors or Masters degree in computer engineering or Electrical Engineering.
Experience:8+ years
Education:Bachelor's in computer engineering/Electrical Engineering
Languages:En-us
Tech Stack:VC FormalJasperGoldSystemVerilog AssertionsSVAFPVConnectivity checkingFRVSequential equivalence checkingSEQTCLPythonPerlRTLInfinity Fabric

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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