Senior Design Verification Engineer

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Last checked: 21 hours agoStatus: Live

Job Summary

Lead chip-level design verification for advanced Ethernet PHY devices, creating test benches, simulations, and validation across module, DUT, and system levels. Work with DSP data-path and feedback-loop concepts to evaluate BER and stability metrics, and drive analog and channel model development for FPGA emulation. Collaborate with digital and analog design teams in pre-silicon verification, automate DV regressions, debug critical features, and document results and assumptions clearly.

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Study specifications and review RTL to develop test cases for coverage.
•Develop test benches for module-level, DUT-level, and system-level verification.
•Lead and participate in chip-level DV, including simulation and validation of complex systems with the DSP data path.
•Lead analog and channel model development for FPGA emulation, including synthesizable channel model architecture, FPGA bring-up, and performance verification (BER, SNR).
•Analyze simulation/emulation results, lead debug for critical features, automate DV regressions, and clearly document models, assumptions, and results.

Key Requirements

•BS degree (electrical engineering) or equivalent experience in the design of equipment, components, or circuitry.
•2–5 years of experience in design verification (DV) and system modeling for analog/mixed-signal.
•Understanding of digital design concepts; strong programming skills in Verilog, Matlab, and Python.
•Strong fundamentals in DSP concepts (filters, signal processing, sampling, modulation, adaptive filters).
•Exposure to FPGA-based emulation and prototyping (preferred).

Experience:2-5 yearsDesign verificationSystem modelingAnalog and mixed-signalDSPFPGA emulation

Education:Bachelor's in Electrical Engineering

Skills:Strong analytical skillsProblem-solvingCommunicationDocumentationCross-functional teamworkSelf-driven

Tech Stack:VerilogMatlabPythonFPGARTLDSPForward Error Correction (FEC)Viterbi algorithmReed-Solomon (RS) decodingEMIEMCGLS

Company Brief

Texas Instruments

Industry: Electronics Manufacturing

Website

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Texas Instruments

1 month ago

Senior Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 21 hours agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Study specifications and review RTL to develop test cases for coverage.
•Develop test benches for module-level, DUT-level, and system-level verification.
•Lead and participate in chip-level DV, including simulation and validation of complex systems with the DSP data path.
•Lead analog and channel model development for FPGA emulation, including synthesizable channel model architecture, FPGA bring-up, and performance verification (BER, SNR).
•Analyze simulation/emulation results, lead debug for critical features, automate DV regressions, and clearly document models, assumptions, and results.

Key Requirements

•BS degree (electrical engineering) or equivalent experience in the design of equipment, components, or circuitry.
•2–5 years of experience in design verification (DV) and system modeling for analog/mixed-signal.
•Understanding of digital design concepts; strong programming skills in Verilog, Matlab, and Python.
•Strong fundamentals in DSP concepts (filters, signal processing, sampling, modulation, adaptive filters).
•Exposure to FPGA-based emulation and prototyping (preferred).

Experience:2-5 yearsDesign verificationSystem modelingAnalog and mixed-signalDSPFPGA emulation

Education:Bachelor's in Electrical Engineering

Skills:Strong analytical skillsProblem-solvingCommunicationDocumentationCross-functional teamworkSelf-driven

Tech Stack:VerilogMatlabPythonFPGARTLDSPForward Error Correction (FEC)Viterbi algorithmReed-Solomon (RS) decodingEMIEMCGLS

Company Brief

Texas Instruments

Industry: Electronics Manufacturing

Website