Principal Staff Silicon Design Engineer - DDR Verification

AMD
Singapore
Workplace: HybridFull timeSGD 142,100 - 203,000 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Communication","Presentation","Collaboration","Mentorship","Technical leadership"]

Lead verification efforts for server memory DDR interfaces, driving DDR5, LPDDR5, and DFI verification strategies across DIMMs. Own verification architecture and technical solutions, align firmware/BIOS/SW with memory interface features, and partner with HW/firmware/SW teams to identify risks and resolve integration issues. Guide a verification team through test plan reviews, emulation planning, pre-Si bug resolution, and power/performance and functional verification sign-offs, including post-Si debug support.

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FursaFursa
AMD
AMD
5 days ago

Principal Staff Silicon Design Engineer - DDR Verification

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Source: Company careers pageValidated by: Fursa AI
Last checked: 7 hours agoStatus: Live

Job Summary

Lead verification efforts for server memory DDR interfaces, driving DDR5, LPDDR5, and DFI verification strategies across DIMMs. Own verification architecture and technical solutions, align firmware/BIOS/SW with memory interface features, and partner with HW/firmware/SW teams to identify risks and resolve integration issues. Guide a verification team through test plan reviews, emulation planning, pre-Si bug resolution, and power/performance and functional verification sign-offs, including post-Si debug support.
Location: Singapore
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Manager level

Key Responsibilities

  • •Lead and guide a team of verification engineers to develop and execute verification strategies for DDR5, LPDDR5, and DFI memory systems.
  • •Comprehend the SoC as a complete system (HW, FW, BIOS, and SW) and ensure alignment so memory interface features are enabled.
  • •Work cross-functionally with IP/domain architects to identify and assess technical issues/risks and develop architectural solutions to meet product requirements.
  • •Develop and share verification methodology contributions, including architecture analysis and technical solutions for marketing/feature change requests.
  • •Coordinate with design teams for verification test plan reviews, timing targets, emulation plans, pre-Si bug resolution, and power/performance and functional verification sign-offs; support post-Si debug resolution.

Pay and Benefits

Salary: SGD 142,100 - 203,000 annually

Key Requirements

  • •Expert-level knowledge of SystemVerilog and UVM, with experience building and implementing DDR5/LPDDR5 testbenches, simulation environments, and functional coverage models.
  • •Strong proficiency in SystemVerilog assertions, constraints, and coverage, including experience with formal verification methods and tool usage beyond standard apps.
  • •Demonstrated verification success with multiple tape-out experiences and verification sign-offs in a high-performance server memory environment.
  • •Knowledge of end-to-end system alignment across HW (silicon), FW, BIOS, and SW to enable memory interface features.
  • •Proven experience providing technical leadership and collaboration across hardware, firmware, and software teams, including mentoring and communication skills.
Education:Bachelor's
Skills:CommunicationPresentationCollaborationMentorshipTechnical leadership
Languages:En-us
Tech Stack:SystemVerilogUVMC/C++PythonPerlDDR5LPDDR5DFIDIMMsSystemVerilog assertionsFunctional coverageFormal verificationVIPsBFMsGLSNLPXPROPDFT

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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Glassdoor: 3.9
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