Principal application Engineer – Digital Implementation & Physical Design

Drive adoption of Cadence digital implementation, physical design, and static verification solutions for key customers in the region. Lead hands-on ASIC physical design implementation—floorplanning, power grid design, place-and-route, clock tree synthesis, and timing closure—while optimizing performance, power, and area on advanced technology nodes. Partner with customer design teams and Cadence R&D to influence methodologies, support tool adoption, and ensure successful tapeouts.