Software Engineer II - Clock Tree Synthesis (CTS), Innovus R&D

Cadence Design Systems
Cambridge
Workplace: OnsiteFull timeFunction: Software EngineeringEducation: high_schoolSkills: ["Problem-solving","Communication","Collaboration","Continuous learning","Analytical thinking"]

Build and refine Clock Tree Synthesis (CTS) algorithms for Cadence’s Innovus R&D team, improving performance, QoR, scalability, and correctness. Debug and optimize CTS capabilities within the Innovus platform to enhance reliability and runtime efficiency. Develop AI-driven, agentic, and data-driven workflows for automated physical design and collaborate with global R&D engineers while clearly communicating technical results through code reviews and documentation.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Cadence Design Systems
Cadence Design Systems
2 months ago

Software Engineer II - Clock Tree Synthesis (CTS), Innovus R&D

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 3 hours agoStatus: Live

Job Summary

Build and refine Clock Tree Synthesis (CTS) algorithms for Cadence’s Innovus R&D team, improving performance, QoR, scalability, and correctness. Debug and optimize CTS capabilities within the Innovus platform to enhance reliability and runtime efficiency. Develop AI-driven, agentic, and data-driven workflows for automated physical design and collaborate with global R&D engineers while clearly communicating technical results through code reviews and documentation.
Location: Cambridge
Workplace: Onsite
Employment Type: Full time
Job Function: Software Engineering
Seniority: Entry level

Key Responsibilities

  • •Design and implement CTS EDA algorithms in C/C++ with focus on performance, QoR, scalability, and correctness.
  • •Debug, optimize, and enhance CTS capabilities by resolving bottlenecks and robustness issues in the Innovus platform.
  • •Develop AI-driven and automated workflows to explore design trade-offs and reduce manual effort.
  • •Investigate and prototype data-informed adaptive techniques to improve reliability and design outcomes across chip architectures.
  • •Collaborate with global R&D teams and communicate work via code reviews, written summaries, and team discussions.

Pay and Benefits

Perks:Health InsuranceDentalIncome ProtectionLife InsurancePensionPaid LeaveEquityGym MembershipCycle To

Key Requirements

  • •MSc in Computer Science, Electrical Engineering, or a related numerate discipline (or equivalent practical experience).
  • •Strong programming skills in C/C++ developed on Linux or Unix-like environments.
  • •Solid understanding of data structures and algorithms, including analysis of algorithmic complexity.
  • •Effective problem-solving skills, with the ability to break down complex technical challenges.
  • •Ability to communicate findings clearly to colleagues.
Education:High School in Computer Science, Electrical Engineering, or related numerate discipline
Skills:Problem-solvingCommunicationCollaborationContinuous learningAnalytical thinking
Tech Stack:CC++LinuxUnixInnovusAI/MLData-driven workflowsAgentic approachesVersion control

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
Glassdoor
Glassdoor: 3.9
WebsiteLinkedInGlassdoor