Lead Design Verification Engineer-Memory Controller
San Jose
Workplace: OnsiteFull timeUSD 175,000 - 300,000 annuallyFunction: Finance & AccountingExperience: 8+ yearsSkills: ["Leadership","Communication","Mentoring","Teamwork","Technical leadership"]Lead verification for cutting-edge DRAM Memory Controller IPs (DDR5, LPDDR6, HBM4), high-speed Crypto, and Network-on-Chip designs. Architect and build simulation and/or formal verification environments for both IP blocks and SoCs, owning verification planning, testbenches, and closure. Manage verification execution for multi-engineer teams, partner with design/architecture/software to define strategy, and use UVM, formal verification, and assertion-based methods to drive first-pass silicon success.
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