Director FPGA Silicon Design Engineering

AMD
San Jose
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Leadership","Communication","Stakeholder management","Cross-functional collaboration","Strategic thinking"]

Lead FPGA silicon architecture for AMD Adaptive Devices, setting the long-term vision and roadmap for configuration, readback, and Partial Reconfiguration across heterogeneous SoC and chiplet environments. Drive end-to-end system trade-offs—latency, security, reliability, bandwidth, and scalability—while partnering with silicon, RTL, software, tools, validation, and product teams. Build and lead a small group of architects and engineers, translating customer requirements into differentiated FPGA capabilities.

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FursaFursa
AMD
AMD
1 week ago

Director FPGA Silicon Design Engineering

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Lead FPGA silicon architecture for AMD Adaptive Devices, setting the long-term vision and roadmap for configuration, readback, and Partial Reconfiguration across heterogeneous SoC and chiplet environments. Drive end-to-end system trade-offs—latency, security, reliability, bandwidth, and scalability—while partnering with silicon, RTL, software, tools, validation, and product teams. Build and lead a small group of architects and engineers, translating customer requirements into differentiated FPGA capabilities.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Director level

Key Responsibilities

  • •Lead FPGA configuration architecture, including bitstream formats, boot flows, interfaces, reliability, and scalability.
  • •Define and drive next-generation Partial Reconfiguration architecture for low-latency, secure, and dynamic deployment models.
  • •Establish long-term architectural vision and roadmap for configuration, PR, readback, debug, and observability capabilities.
  • •Lead innovation in runtime reconfiguration technologies for adaptive, high-availability systems.
  • •Partner across silicon, RTL, software, tools, validation, and product management to deliver end-to-end configuration, PR, and debug solutions.

Key Requirements

  • •Deep expertise in FPGA configuration and Partial Reconfiguration, including bitstreams, protocols, boot flows, security, readback, and debug infrastructure.
  • •Proven track record driving complex FPGA/SoC architectural initiatives from concept through product deployment while leading teams.
  • •Strong ability to balance trade-offs across performance, power, reliability, security, and programmability.
  • •Experience influencing executive stakeholders and mentoring architects, with demonstrated cross-functional execution leadership.
  • •BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related discipline, with evidence of architectural innovation through products or publications.
Experience:FPGAASICSoC
Education:Bachelor's in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline
Skills:LeadershipCommunicationStakeholder managementCross-functional collaborationStrategic thinking
Languages:English
Tech Stack:FPGAPartial ReconfigurationBitstreamsBoot flowsConfigurationReadbackDebug infrastructureSynthesisPlace-and-routeRTLSilicon

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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