Principal Engineer - STA/Synthesis

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Communications, PR & CommunityExperience: 7+ yearsSkills: ["Cross-group communication","Driving innovation","Innovation","Circuit understanding","Problem-solving","Ownership for closure"]

Design and analyze digital and analog circuits for memory products, owning STA constraints and timing closure for core die. Perform DRAM static timing analysis (block-level, top-level, and cell-level), analyze STA reports, and drive closure by reporting violations to design teams. Support verification via parasitic modeling and simulation using industry-standard tools, assist design validation and tape-out revisions, and contribute to STD cell characterization and ARC development for standard cells.

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FursaFursa
Micron Technology
Micron Technology
16 hours ago

Principal Engineer - STA/Synthesis

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Last checked: 5 hours agoStatus: Live

Job Summary

Design and analyze digital and analog circuits for memory products, owning STA constraints and timing closure for core die. Perform DRAM static timing analysis (block-level, top-level, and cell-level), analyze STA reports, and drive closure by reporting violations to design teams. Support verification via parasitic modeling and simulation using industry-standard tools, assist design validation and tape-out revisions, and contribute to STD cell characterization and ARC development for standard cells.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Sr. Manager level

Key Responsibilities

  • •Design and analyze digital and analog circuits for development of memory products.
  • •Own writing constraints and timing closure for core die STA.
  • •Conduct DRAM STA at block-wise, top level, and cell level; analyze reports and violations.
  • •Support parasitic modeling and design validation activities, including reticle experiments and tape-out revisions.
  • •Perform verification with modeling and simulation using industry-standard simulators and contribute to STD cell characterization and ARC writing for standard cells.

Key Requirements

  • •7+ years of experience in static timing analysis and circuit/timing closure work.
  • •Perform DRAM static timing analysis at block-wise, top-level, and cell-level granularity and analyze STA reports.
  • •Write constraints and drive timing-closure by identifying violations and reporting them to the design team.
  • •Use parasitic modeling to assist design validation, including reticle experiments and required tape-out revisions.
  • •Perform verification using modeling and simulation with industry-standard simulators; also support STD cell characterization and ARC development using primeLib and Silicon smart.
Experience:7+ yearsMemorySemiconductorsDRAM
Skills:Cross-group communicationDriving innovationInnovationCircuit understandingProblem-solvingOwnership for closure
Tech Stack:Static timing analysis (STA)DRAMParasitic modelingReticle experimentsPrimeLibSilicon smartModelingSimulationConstraintsTiming closureARCSTD cells

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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