Power Integrity Engineer

Intel
San Jose
Workplace: HybridContractFunction: Energy & Utilities OperationsExperience: 2+ yearsEducation: bachelorsSkills: ["Collaboration","Communication","Disciplined execution"]

As a Power Integrity Engineer in Intel’s Silicon and Platform Engineering Group, you will design and optimize power delivery networks for complex high-speed platforms, boards, packages, and silicon. You’ll develop and analyze 2D/3D models, define power grid specifications and targets, run simulations and test verification plans, and correlate post-measurement results back to pre-silicon analysis. You’ll also collaborate across silicon integration, floor planning, and package teams to deliver platform-level power shapes and decoupling solutions.

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Intel
Intel
1 day ago

Power Integrity Engineer

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Last checked: 5 hours agoStatus: Live
Reposted: similar role first listed 6 months ago

Job Summary

As a Power Integrity Engineer in Intel’s Silicon and Platform Engineering Group, you will design and optimize power delivery networks for complex high-speed platforms, boards, packages, and silicon. You’ll develop and analyze 2D/3D models, define power grid specifications and targets, run simulations and test verification plans, and correlate post-measurement results back to pre-silicon analysis. You’ll also collaborate across silicon integration, floor planning, and package teams to deliver platform-level power shapes and decoupling solutions.
Location: San Jose
Workplace: Hybrid
Employment Type: Contract
Job Function: Energy & Utilities Operations
Seniority: Mid level

Key Responsibilities

  • •Develop and analyze power delivery networks using 2D/3D model extraction and noise analysis across die/C4 bumps, silicon, package, sockets, and boards.
  • •Define power grid specifications and set power and area targets to balance power integrity and performance.
  • •Design test structures, electrical analysis methodologies, and verification plans; perform measurements to characterize power noise and verify post-design performance.
  • •Correlate measurement results back to pre-silicon analysis and estimations to improve accuracy.
  • •Collaborate with silicon integration, die floor planning, and package design teams to optimize on-die decoupling partitions and deliver platform-level power shapes and decoupling solutions.

Key Requirements

  • •Bachelor’s degree or higher in Electrical or Electronic Engineering.
  • •Minimum 2 years of experience as an electrical design engineer at silicon, package, or board level.
  • •Advanced English communication skills (written and oral).
  • •Advanced experience with electrical characterization tools and methodologies.
  • •Intermediate knowledge of power integrity design, power delivery networks, and hardware architecture fundamentals, including power/performance analysis and optimization.
Experience:2+ years
Education:Bachelor's in Electrical or Electronic Engineering
Skills:CollaborationCommunicationDisciplined execution
Languages:English
Tech Stack:Sigrity PowerSIPowerDCHSpiceMATLABHFSS2D model extraction3D model extraction

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
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