Intern - DRAM Test Structure Design and Layout Engineering
Boise
Workplace: OnsiteInternshipFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Analytical thinking","Problem-solving","Communication"]Contribute to the development and verification of semiconductor test structures used to characterize advanced DRAM technologies. Work on arranging test structures for new nodes, supporting physical verification (DRC/LVS), correlating simulations with silicon characterization, and analyzing electrical results. Use layout databases and industry EDA tools to build, modify, and validate composed data, write automation scripts in Python/Tcl, and participate in build reviews and technical problem-solving with cross-functional teams.
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