Lead Application Engineer

Cadence Design Systems
Shanghai
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceExperience: 5+ yearsEducation: bachelorsSkills: ["Problem-solving","Communication","Technical articulation","Hands-on execution","Team collaboration"]

Provide hands-on technical support for digital IC design implementation, including RTL-to-GDSII workflows for both low-power and high-performance designs. Demonstrate products through product demonstrations and sales presentations, supporting technical evaluation and assessment. Use expertise in synthesis flows, low-power techniques (UPF, IEEE1801, CPF), DFT, and logic equivalence checking, while collaborating with teammates and communicating technical issues clearly.

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Cadence Design Systems
Cadence Design Systems
1 day ago

Lead Application Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live
Reposted: similar role first listed 6 months ago

Job Summary

Provide hands-on technical support for digital IC design implementation, including RTL-to-GDSII workflows for both low-power and high-performance designs. Demonstrate products through product demonstrations and sales presentations, supporting technical evaluation and assessment. Use expertise in synthesis flows, low-power techniques (UPF, IEEE1801, CPF), DFT, and logic equivalence checking, while collaborating with teammates and communicating technical issues clearly.
Location: Shanghai
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance
Seniority: Mid level

Key Responsibilities

  • •Provide key technical support for digital IC design implementation.
  • •Demonstrate products via product demonstrations and sales presentations.
  • •Perform hands-on RTL-to-GDSII design methodology work, including low-power and high-performance designs.
  • •Support technical evaluation and assessment of design/product needs.
  • •Take a leading role among team members with limited instruction on routine and general assignments.

Key Requirements

  • •Bachelor’s degree and 5+ years’ experience in IC design, electronic engineering, or computer science applications.
  • •Hands-on experience with RTL-to-GDSII design methodology for low-power and high-performance designs.
  • •Real design experience including synthesis, low-power design, DFT, and logic equivalence checking.
  • •Experience with synthesis flow and understanding low-power design using UPF, IEEE1801, and CPF.
  • •Ability to understand and articulate technical issues, plus working knowledge of one or more programming languages and effective communication/soft skills.
Experience:5+ yearsIC designElectronic engineeringComputer scienceDigital IC design
Education:Bachelor's
Skills:Problem-solvingCommunicationTechnical articulationHands-on executionTeam collaboration
Languages:English
Tech Stack:RTL-to-GDSIIRTLGDSIISynthesisLow-power designDFTLogic equivalence checkingUPFIEEE 1801CPFGenusJoules

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
Glassdoor
Glassdoor: 3.9
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