Senior Hardware Design Engineer, Ethernet Switching

Arista Networks
United States
Workplace: OnsiteFull timeUSD 162,000 - 225,000 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 10+ yearsEducation: bachelorsSkills: ["Cross-functional collaboration","Mentoring","System debugging","Prototype bring-up","Technical documentation"]

Design and deliver end-to-end high-speed Ethernet switching hardware for enterprise, hyperscale data centers, and AI clusters. Own functional specifications, component selection, schematic capture, and PCB stackup details, then bring up and debug prototypes. Collaborate with eCAD, software, test, and manufacturing teams to run signal integrity simulations, coordinate fabrication, and support production through high-yield design for manufacturability.

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FursaFursa
Arista Networks
Arista Networks
2 months ago

Senior Hardware Design Engineer, Ethernet Switching

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 9 hours agoStatus: Live

Job Summary

Design and deliver end-to-end high-speed Ethernet switching hardware for enterprise, hyperscale data centers, and AI clusters. Own functional specifications, component selection, schematic capture, and PCB stackup details, then bring up and debug prototypes. Collaborate with eCAD, software, test, and manufacturing teams to run signal integrity simulations, coordinate fabrication, and support production through high-yield design for manufacturability.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Own the end-to-end hardware design process for high-power, high-density Ethernet switches used in AI networks.
  • •Author functional specifications, select and qualify components, and produce flat and hierarchical schematic designs.
  • •Work with eCAD teams on PCB layout, footprints, and specify stackup/fabrication details with PCB vendors.
  • •Run or perform signal integrity simulations for power and datapath signals, then debug prototypes during lab bring-up.
  • •Coordinate with contract manufacturers from prototype through production, train for high-yield test/manufacturing, and mentor other engineers while driving cross-team system debug.

Pay and Benefits

Salary: USD 162,000 - 225,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVisionWellness StipendTax SavingsIncome Protection

Key Requirements

  • •BSEE or MSEE and 10+ years of relevant hardware engineering experience.
  • •Experience designing networking hardware, including 100G and 200G PAM4 Ethernet switching.
  • •Design high-layer-count (20+ layers) boards with 50G+ signals and advanced PCB technologies (sequential lamination, HDI, ultra-low-loss materials).
  • •Experience with high-speed interfaces such as DDR and PCIe, plus multi-phase DC/DC design for high current transient loads.
  • •Proficiency with signal/power integrity concepts and tools (impedance, PDNs, differential routing, insertion loss, S-parameters, TDRs, VNAs) and FPGA/system simulation using Verilog.
Experience:10+ yearsNetworkingData centersAI clusters
Education:Bachelor's
Skills:Cross-functional collaborationMentoringSystem debuggingPrototype bring-upTechnical documentation
Languages:English
Tech Stack:Ethernet switching100G200GPAM4X86ARMPCBECADSignal integrityPower integrityImpedancePDNDifferential routingInsertion lossS-parametersTDRVNADDRPCIeDC/DC

Company Brief

Arista Networks
Designs and sells high-performance cloud networking hardware and software for large-scale data centers and enterprise environments, including switches, routers, and network operating systems focused on programmability, telemetry, and low-latency networking.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 2004
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