ASIC Implementation Engineer

Broadcom
United States
Workplace: OnsiteFull timeUSD 143,800 - 230,000 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 12+ yearsSkills: ["Python","Tcl","Perl","EDA tools","Clock tree","Floorplanning","Bump planning"]

Seeking an experienced ASIC top-level floorplanner and physical design engineer to take RTL to silicon tape-out for AI and PCIe switch products. You will own floorplanning, clock tree, and top-level partitions, while coordinating with design, package, and methodology teams. Strong Python/Tcl/Perl scripting and EDA tool expertise required; in-person work at the San Jose site.

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FursaFursa
Broadcom
Broadcom
3 months ago

ASIC Implementation Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 31 days agoStatus: Live
Reposted: similar role first listed 5 months ago

Job Summary

Seeking an experienced ASIC top-level floorplanner and physical design engineer to take RTL to silicon tape-out for AI and PCIe switch products. You will own floorplanning, clock tree, and top-level partitions, while coordinating with design, package, and methodology teams. Strong Python/Tcl/Perl scripting and EDA tool expertise required; in-person work at the San Jose site.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Own chip floor planning, partition creation, clock tree and delivery of top level partitions
  • •Resolve physical design issues related to chip integration and assembly
  • •Manage all cross functional interactions related to top level floorplanning, I/O and bump planning with package team
  • •Develop and improve floorplan implementation methodologies using both industry and internal tools
  • •Perform technical evaluations of vendors and IP, providing recommendations and assessments to meet design specification

Pay and Benefits

Salary: USD 143,800 - 230,000 annually
Equity and Bonus:Equity
Perks:MedicalDentalVision401kEsppEapHolidaysPaid Leave

Key Requirements

  • •Bachelor's in Electrical Engineering with 12+ years of top-level floorplanning experience or Master's in Electrical Engineering with 10+ years of floorplanning experience
  • •Experience with die size estimation, partitioning, clocking and pin planning
  • •Proven experience with technologies such as Switch Fabric, Arbiter, High Speed DDR, SerDes, HBM, D2D I/O, chiplet
  • •Experience solving chip-level DRC/LVS/EMIR issues for advanced nodes
  • •Scripting in Python, Tcl, or Perl and proficiency with EDA tools
Experience:12+ yearsSemiconductorASICFloorplanningSiliconHardware
Skills:PythonTclPerlEDA toolsClock treeFloorplanningBump planning
Tech Stack:PythonTclPerlEDA toolsClock treeFloorplanningBump planningDRCLVSEMIR

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn