CPU Core RTL Design Engineer

Design and optimize next-generation high-performance CPU core pipeline logic within AMD’s central core RTL team. Partner with architecture, performance, verification, and physical design teams to define microarchitecture features, balance performance/power/timing, and deliver scalable RTL methodologies. Work across the product lifecycle, supporting RTL implementation, synthesis and timing closure, and debugging pre- and post-silicon issues for client, server, and AI platforms.