Silicon Validation Engineer

NVIDIA
Santa Clara
Workplace: HybridFull timeUSD 116,000 - 189,750 annuallyFunction: QA, Test & Release EngineeringExperience: 2+ yearsEducation: bachelorsSkills: ["Collaboration","Cross-functional teamwork"]

Own system-level validation strategy for next-generation GPU and AI accelerator silicon that doesn’t exist yet. Design validation for corner cases, PVT, timing, signal integrity, power, and feature interactions, and build AI-assisted, data-driven validation workflows to improve coverage and debug turnaround. Profile real workloads, deploy automation and telemetry pipelines at scale, and drive silicon bring-up and root-cause debug using reusable methods.

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FursaFursa
NVIDIA
NVIDIA
4 days ago

Silicon Validation Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 12 hours agoStatus: Live

Job Summary

Own system-level validation strategy for next-generation GPU and AI accelerator silicon that doesn’t exist yet. Design validation for corner cases, PVT, timing, signal integrity, power, and feature interactions, and build AI-assisted, data-driven validation workflows to improve coverage and debug turnaround. Profile real workloads, deploy automation and telemetry pipelines at scale, and drive silicon bring-up and root-cause debug using reusable methods.
Location: Santa Clara
Workplace: Hybrid
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Design system-level validation strategies for complex architectures, corner cases, PVT, and large-scale behavior.
  • •Build AI-assisted and data-driven validation workflows to improve coverage, debug turnaround, and efficiency.
  • •Profile real workloads including training, inference, HPC, video, and emerging applications.
  • •Deploy automation and telemetry pipelines that scale across products and teams.
  • •Drive silicon bring-up and root-cause debug with reusable, high-leverage methods.

Pay and Benefits

Salary: USD 116,000 - 189,750 annually
Equity and Bonus:Equity

Key Requirements

  • •BS/MS in EE/CE (or equivalent experience).
  • •2+ years in silicon bring-up, ASIC validation, or system-level debug.
  • •Working knowledge of PVT, timing (STA), signal integrity, power, and high-speed IO (PCIe, chip-to-chip).
  • •Understanding of firmware/driver-hardware interaction.
  • •Experience or curiosity around data-driven workflows, telemetry, and AI/LLM-assisted development.
Experience:2+ yearsSilicon bring-upASIC validationSystem-level debug
Education:Bachelor's in EE/CE
Skills:CollaborationCross-functional teamwork
Tech Stack:PVTSTASignal integrityHigh-speed IOPCIeTelemetryAutomation frameworksAI/MLLLM-assisted development

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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