Manager, ASIC Design Engineering (Starshield Silicon)

Lead a high-performance ASIC/FPGA design team for SpaceX Starshield satellites. Oversee RTL/Verilog development, hardware-software partitioning, and verification, while driving architectural trades, timing, and power optimizations. mentor engineers, collaborate across teams to push performance, and support silicon bring-up and lab validation in a mission-critical defense-focused program.