Sr. Silicon Design Engineer
Austin
Workplace: OnsiteFull timeUSD 106,470 - 182,520 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 1+ yearsEducation: mastersSkills: ["Technical leadership","Problem-solving"]Develop and maintain block-level RTL IP and MP subsystem feature specs, micro-architecture, and synthesizable RTL design methodology. Build, debug, and verify RTL using C-DPI directed test methodology and verification team testbenches to achieve feature and coverage closure. Triage and resolve retrogressions and integration issues across SoC Integration, SoC DV, and post-silicon validation, providing advanced-level technical leadership in IP functionality and design methodology.
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