Senior ASIC Design Engineer

NVIDIA
Santa Clara
Workplace: HybridFull timeUSD 168,000 - 264,500 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Communication","Teamwork","Problem-solving"]

Senior ASIC Design Engineer responsible for implementing high-performance RTL for GPUs/SoCs, evaluating architectural trade-offs, and delivering fully verified, synthesis- and timing-clean designs. Collaborates with architects, verification, synthesis, timing, and back-end teams to develop IPs like GPU work schedulers and DMA engines, shaping silicon debug and post-silicon validation.

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FursaFursa
NVIDIA
NVIDIA
6 months ago

Senior ASIC Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Senior ASIC Design Engineer responsible for implementing high-performance RTL for GPUs/SoCs, evaluating architectural trade-offs, and delivering fully verified, synthesis- and timing-clean designs. Collaborates with architects, verification, synthesis, timing, and back-end teams to develop IPs like GPU work schedulers and DMA engines, shaping silicon debug and post-silicon validation.
Location: Santa Clara
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Sr. Manager level

Key Responsibilities

  • •Implement, document and deliver high performance, area and power efficient RTL to meet design targets.
  • •Analyze architectural trade-offs based on features, performance requirements and system limitations.
  • •Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
  • •Collaborate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish tasks.
  • •Work on a broad list of IPs such as GPU work scheduler, time distribution system, interrupt controllers, and DMA engines.

Pay and Benefits

Salary: USD 168,000 - 264,500 annually
Equity and Bonus:Equity
Perks:Equity

Key Requirements

  • •Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science.
  • •8+ years of meaningful work experience.
  • •Experience in micro-architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches.
  • •Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
  • •Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic.
Experience:8+ yearsSemiconductorASICGPUSoCVLSIDigital design
Education:Bachelor's in Electrical Engineering
Skills:CommunicationTeamworkProblem-solving
Tech Stack:VerilogRTLSynthesisTiming analysisC/C++Python

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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