Design Verification Engineer

Drive SoC verification strategy for Texas Instruments’ MCU organization, including writing test plans and developing/modifying test benches. Own SoC DV signoff using C and/or SV-UVM, reuse UVM components, and define structural and functional coverage goals. Verify RTL/GLS/AMS (including low-power verification) and collaborate with IP/architecture and RTL teams to meet verification milestones in fast-growing AI/data-center and humanoid systems domains.