Senior Circuit Design Engineer

Design and deliver circuit IPs for NVIDIA’s SRAM arrays and analog/digital circuits, shaping innovative methodologies to close the gap between pre-silicon estimates and on-chip performance. Lead design and verification for custom circuit IPs to improve power, performance, silicon correlation, and security across CPU, GPU, and networking chips. Collaborate across global teams, investigate silicon issues, run flows like EM/IR/noise and static timing analysis, and mentor junior engineers.