DFT Design Engineer

Intel
Israel
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Problem-solving","Communication","Collaboration","Cross-functional collaboration","Continuous learning"]

Join Intel’s Wireless Connectivity Group to help ensure testability and manufacturability of advanced semiconductor products. You’ll design DFT features (SCAN, MBIST, BSCAN) using RTL/SystemVerilog, support DFT timing closure, and generate test content for manufacturing. Collaborate on DFT architecture and verification plans, debug failing RTL tests, integrate DFT blocks into IP/SoCs, and work with post-silicon and manufacturing teams to improve test coverage, DPM, and production test efficiency.

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Intel
Intel
3 hours ago

DFT Design Engineer

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Job Summary

Join Intel’s Wireless Connectivity Group to help ensure testability and manufacturability of advanced semiconductor products. You’ll design DFT features (SCAN, MBIST, BSCAN) using RTL/SystemVerilog, support DFT timing closure, and generate test content for manufacturing. Collaborate on DFT architecture and verification plans, debug failing RTL tests, integrate DFT blocks into IP/SoCs, and work with post-silicon and manufacturing teams to improve test coverage, DPM, and production test efficiency.
Location: Israel
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop DFT logic by writing RTL code and simulation for SCAN, MBIST, and BSCAN features.
  • •Support DFT timing closure and deliver test content to manufacturing.
  • •Collaborate on defining DFT architecture and microarchitecture features for blocks, subsystems, and SoCs.
  • •Write and generate RTL and structural code for DFT integration using appropriate strategies and tools.
  • •Debug and resolve failing RTL tests; integrate DFT blocks into functional IP and SoCs and support post-silicon/manufacturing debug, documentation, and test coverage goals.

Key Requirements

  • •Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • •4+ years of experience in DFT engineering.
  • •Strong knowledge of SCAN ATPG.
  • •Hands-on experience with RTL design and SystemVerilog with digital design fundamentals.
  • •Proficiency in EDA tools and techniques (e.g., lint tools and MCO/timing/clock exception handling) and expertise in Scan ATPG and test automation.
Experience:SemiconductorDFT
Education:Bachelor's
Skills:Problem-solvingCommunicationCollaborationCross-functional collaborationContinuous learning
Tech Stack:Design for Test (DFT)SCANMBISTBSCANRTLSystemVerilogRTl codingSimulationRTL integrationStructural codeSCAN ATPGTest automationEDA toolsLint toolsMCOTiming closureClock exception handlingVerification plansATESoC

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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