Staff Silicon Design Verification Engineer

AMD
Penang
Workplace: HybridFull timeMYR 126,000 - 180,000 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Communication","Teamwork","Analytical thinking","Problem-solving","Attention to detail"]

Own functional verification for next-generation AMD microprocessor and SoC designs, from test planning and creation through debug, coverage, and sign-off. Collaborate with design teams to define verification requirements for high-speed, low-power digital circuits. Develop verification environments using UVM with Verilog/SystemVerilog, coverage-driven constraint random/direct testing, and formal verification, including testbench components and libraries.

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FursaFursa
AMD
AMD
1 day ago

Staff Silicon Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 20 hours agoStatus: Live
Reposted: similar role first listed 8 months ago

Job Summary

Own functional verification for next-generation AMD microprocessor and SoC designs, from test planning and creation through debug, coverage, and sign-off. Collaborate with design teams to define verification requirements for high-speed, low-power digital circuits. Develop verification environments using UVM with Verilog/SystemVerilog, coverage-driven constraint random/direct testing, and formal verification, including testbench components and libraries.
Location: Penang
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Collaborate with design teams to define verification requirements for high-speed, low-power digital circuit designs from definition through implementation.
  • •Lead functional verification activities end-to-end: test planning, test creation, debug, coverage, and sign-off closure with technical leadership.
  • •Verify high-speed, low-power digital designs at IP and system level using coverage-driven constraint random and directed testing techniques.
  • •Build verification testbenches and components (test/sequence libraries, monitors, models, BFMs) using OOP verification methods with the UVM methodology.
  • •Apply advanced verification techniques, including formal verification, to ensure functional correctness of next-generation microprocessor and SoC designs.

Pay and Benefits

Salary: MYR 126,000 - 180,000 annually

Key Requirements

  • •Advanced knowledge of ASIC/SOC design and modern verification flows.
  • •Proficiency with Verilog, SystemVerilog, and UVM for building verification environments.
  • •Experience with functional verification across IP and system levels, including coverage-driven constraint random and directed testing.
  • •Familiarity with verification techniques such as formal verification, plus testbench components like monitors, models, and BFMs.
  • •Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field with relevant industry experience.
Experience:ASIC/SOCSemiconductorFunctional verificationUVMSoC design
Education:Bachelor's in Electrical Engineering, Computer Science, or related field
Skills:CommunicationTeamworkAnalytical thinkingProblem-solvingAttention to detail
Tech Stack:VerilogSystemVerilogUVMRTLTestbenchCoverage-drivenConstraint randomDirected testingFormal verificationTest and sequence librariesMonitorsModelsBFMsObject-oriented programmingAI toolsPower-aware simulationFirmware/hardware co-verificationAMBAAXIAPB

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn