Principal Design Verification Engineer (Silicon Engineering)
SpaceX
Sunnyvale, Irvine, Austin, Redmond
Workplace: OnsiteFull timeUSD 210,000 - 310,000 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Python","UVM","OVM","VMM","RTL","FPGA","ASIC"]Lead digital verification for next-generation ASICs/FPGA at block and system levels, partnering with cross-disciplinary teams to drive pre-/post-silicon validation and test plan execution. A hands-on, self-starting engineer contributing to space-grade silicon designs, with emphasis on verification methodologies and automation to ensure robust, high-performance Starlink components.
