Defect Review Technician

Intel
Malaysia
Workplace: OnsiteFull timeFunction: Field Service, Maintenance & Skilled TradesEducation: certificationSkills: ["Problem-solving","Attention to detail","Communication","Teamwork","Adaptability"]

Support Intel’s Advanced Packaging Command Center (APCC) by performing global defect review activities across wafer packaging manufacturing. Classify defects from images captured by multiple inspection/metrology tools, validate defect classifications against specifications, and ensure accurate hold-lot disposition documentation. Conduct first-level defect analysis, collaborate with the Layer Owner to standardize approaches and refine OCAP procedures, and help reduce defect noise while balancing quality and manufacturing efficiency at scale.

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FursaFursa
Intel
Intel
3 months ago

Defect Review Technician

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Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live
Reposted: similar role first listed 4 weeks ago

Job Summary

Support Intel’s Advanced Packaging Command Center (APCC) by performing global defect review activities across wafer packaging manufacturing. Classify defects from images captured by multiple inspection/metrology tools, validate defect classifications against specifications, and ensure accurate hold-lot disposition documentation. Conduct first-level defect analysis, collaborate with the Layer Owner to standardize approaches and refine OCAP procedures, and help reduce defect noise while balancing quality and manufacturing efficiency at scale.
Location: Malaysia
Workplace: Onsite
Employment Type: Full time
Job Function: Field Service, Maintenance & Skilled Trades
Seniority: Mid level

Key Responsibilities

  • •Review and analyze defect images from diverse metrology tools and accurately classify defects per documented specifications.
  • •Validate defect classifications against established criteria to avoid both over-rejection and under-rejection scenarios.
  • •Ensure compliance in hold lot disposition based on documented Out-of-Control Action Plans (OCAP), with proper documentation and traceability.
  • •Perform first level defect analysis for all flagged defects and document findings and recommendations for Layer Owner decisions.
  • •Collaborate with the Layer Owner to standardize defect categorization approaches and refine OCAP procedures based on emerging defect patterns.

Key Requirements

  • •Diploma in Engineering or a technical discipline (e.g., Electrical, Mechanical, Manufacturing, Mechatronics, Semiconductor-related fields).
  • •3-5 years of experience in wafer assembly processes, manufacturing systems, or the semiconductor environment.
  • •Familiarity with wafer fabrication/assembly processes and associated failure modes or mechanisms.
  • •Strong problem-solving skills and attention to detail with operational steps and defects, including managing multiple tasks concurrently.
  • •Effective written and verbal communication skills in English.
Experience:SemiconductorWafer assemblyManufacturing
Education:Certification / Diploma
Skills:Problem-solvingAttention to detailCommunicationTeamworkAdaptability
Languages:English
Tech Stack:Metrology toolsInspection systems

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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