PCIE Architect

AMD
Hyderabad, Bengaluru
Workplace: OnsiteFull timeINR 2,186,520 - 3,123,600 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 7+ yearsEducation: phdSkills: ["Communication","Collaboration","Execution excellence"]

Drive next-generation Adaptive and Embedded SoC architecture focused on I/O subsystems over PCIe, UAL, and CXL. Define PCIe DMA and I/O architectures, including interactions across embedded processors, NoC, memory controllers, and FPGA fabric. Build flexible modular designs for chiplet/monolithic/3D form factors, scope requirements with customers, analyze PPA tradeoffs, author specifications, and guide pre- and post-silicon validation.

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FursaFursa
AMD
AMD
1 month ago

PCIE Architect

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Source: Company careers pageValidated by: Fursa AI
Last checked: 16 hours agoStatus: Live

Job Summary

Drive next-generation Adaptive and Embedded SoC architecture focused on I/O subsystems over PCIe, UAL, and CXL. Define PCIe DMA and I/O architectures, including interactions across embedded processors, NoC, memory controllers, and FPGA fabric. Build flexible modular designs for chiplet/monolithic/3D form factors, scope requirements with customers, analyze PPA tradeoffs, author specifications, and guide pre- and post-silicon validation.
Location: Hyderabad, Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Drive SoC architecture initiatives focused on I/O subsystems connected over PCIe, UAL, or CXL.
  • •Define I/O subsystem and PCIe DMA architectures, including interactions with embedded processor subsystems, Network on Chip, memory controllers, and FPGA fabric.
  • •Create flexible, modular I/O subsystem architectures deployable in chiplet, monolithic, or 3D form factors.
  • •Collaborate with customers and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and define architectural requirements meeting PPA and schedule targets.
  • •Author architecture specifications and guide pre-silicon design/verification and post-silicon validation during execution.

Pay and Benefits

Salary: INR 2,186,520 - 3,123,600 annually

Key Requirements

  • •7+ years driving SoC architecture, with focus on I/O subsystems connected over PCIe, UAL, or CXL.
  • •Strong background architecting SoC and I/O subsystems involving PCIe, PCIe-DMA engines, or CXL.
  • •Deep technical knowledge of PCIe or CXL protocol specifications and how mandatory/optional features are leveraged.
  • •Knowledge of I/O subsystem and DMA interactions with internal embedded processor subsystems (x86, RISC-V, or ARM) and external host CPUs.
  • •BS/MS/PhD in electrical or computer engineering (or related field).
Experience:7+ yearsEmbedded computingAerospace & defenseData-centerNetworkingAutomotive
Education:PhD / Doctorate in electrical or computer engineering (or related field)
Skills:CommunicationCollaborationExecution excellence
Languages:En-us
Tech Stack:PCIeCXLUALDMASoC architectureI/O subsystemPCIe-DMAConfidential ComputeChipletMonolithic3D form factorsNetwork on ChipMemory controllersFPGA fabricEmbedded processor-subsystemsX86RISC-VARMAXIAXI Interconnects

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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