RTL Design Lead - PCIe/CXL/UAL/DMA
AMD
Hyderabad, Bengaluru
Workplace: OnsiteFull timeINR 2,186,520 - 3,123,600 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 7+ yearsEducation: phdSkills: ["Communication","Collaboration","Execution excellence"]Drive next-generation Adaptive and Embedded SoC architecture focused on I/O subsystems over PCIe, UAL, and CXL. Define PCIe DMA and I/O architectures, including interactions across embedded processors, NoC, memory controllers, and FPGA fabric. Build flexible modular designs for chiplet/monolithic/3D form factors, scope requirements with customers, analyze PPA tradeoffs, author specifications, and guide pre- and post-silicon validation.

