SpaceX

2 days ago

RFIC Layout Designer (RFIC Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Lead RFIC technical layout for custom analog and RF integrated circuits supporting multiple silicon programs for Starlink. Own chip floor planning and pad/power/ground strategy, perform block and top-level layout integration, and run DRC/ERC and layout-versus-schematic checks. Drive tape-out readiness (including density fill and manufacturability checks), trial EDA tooling improvements, and collaborate with RFIC/mixed-signal teams to reduce parasitics and ensure reliable, manufacturable designs.

Location: Irvine, Redmond, Palo Alto

Workplace: Onsite

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Seniority: Mid level

Key Responsibilities

•Work with IC designers and chip leads to determine chip floor plan, including power/ground distribution and pad locations with packaging engineers.
•Estimate layout schedules, identify complexity areas early, and manage layout work planning.
•Perform layout of custom RF and analog circuit blocks with focus on matching and minimizing parasitic capacitance.
•Run DRC/ERC and layout-versus-schematic checks, resolve errors, and complete top-level layout integration (including ESD structures and pad assembly).
•Perform final tape-out tasks (density fill, design-for-manufacturability checks, and sharing GDS with the foundry) and trial new EDA tools/features.

Key Requirements

•Bachelor’s degree in electrical or computer engineering with 1+ years of professional experience as an IC layout designer, OR 3+ years of professional IC layout design experience in lieu of a degree.
•Strong analog layout skills.
•Experience with advanced node IC layouts (22nm, 16nm, 7nm, 5nm or below).
•Experience in layout of circuits up to 50GHz and sensitive RF blocks (e.g., low noise amplifiers, voltage controlled oscillators, mixers).
•Experience with scripting and EDA workflows (e.g., shell scripting, Perl/Python or similar) and managing revision control systems.

Experience:1+ years

Education:Bachelor's in electrical or computer engineering

Skills:CommunicationIndependent problem-solvingProactiveIntellectually curious

Tech Stack:RFICAnalog layoutDRCERCLayout versus schematicGDSEDALinuxPerlPythonShell scriptingRevision controlDensity fillDesign for manufacturabilityElectrostatic discharge (ESD) structures

Eligibility

Nationality:US National

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

SpaceX

Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn

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SpaceX

2 days ago

RFIC Layout Designer (RFIC Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Location: Irvine, Redmond, Palo Alto

Workplace: Onsite

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Seniority: Mid level

Key Responsibilities

•Work with IC designers and chip leads to determine chip floor plan, including power/ground distribution and pad locations with packaging engineers.
•Estimate layout schedules, identify complexity areas early, and manage layout work planning.
•Perform layout of custom RF and analog circuit blocks with focus on matching and minimizing parasitic capacitance.
•Run DRC/ERC and layout-versus-schematic checks, resolve errors, and complete top-level layout integration (including ESD structures and pad assembly).
•Perform final tape-out tasks (density fill, design-for-manufacturability checks, and sharing GDS with the foundry) and trial new EDA tools/features.

Key Requirements

•Bachelor’s degree in electrical or computer engineering with 1+ years of professional experience as an IC layout designer, OR 3+ years of professional IC layout design experience in lieu of a degree.
•Strong analog layout skills.
•Experience with advanced node IC layouts (22nm, 16nm, 7nm, 5nm or below).
•Experience in layout of circuits up to 50GHz and sensitive RF blocks (e.g., low noise amplifiers, voltage controlled oscillators, mixers).
•Experience with scripting and EDA workflows (e.g., shell scripting, Perl/Python or similar) and managing revision control systems.

Experience:1+ years

Education:Bachelor's in electrical or computer engineering

Skills:CommunicationIndependent problem-solvingProactiveIntellectually curious

Tech Stack:RFICAnalog layoutDRCERCLayout versus schematicGDSEDALinuxPerlPythonShell scriptingRevision controlDensity fillDesign for manufacturabilityElectrostatic discharge (ESD) structures

Eligibility

Nationality:US National

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

SpaceX

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn