Engineer-std cell layout

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringSkills: ["Leadership","Project planning","Collaboration","Attention to quality","Documentation"]

Design and maintain standard cell layouts for new DRAM products on new technologies, guiding projects from initial specifications through PPA-qualified library release. Collaborate with DTCO, Process, CMOS, and CAD teams to define stdcells architecture, negotiate verification needs, and ensure on-time delivery of high-quality block-level layouts. Perform layout verification (LVS/DRC/Latchup), quality checks, and documentation while using AI-assisted workflows to improve design productivity and reduce manual effort.

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FursaFursa
Micron Technology
Micron Technology
1 month ago

Engineer-std cell layout

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Source: Company careers pageValidated by: Fursa AI
Last checked: 20 hours agoStatus: Live

Job Summary

Design and maintain standard cell layouts for new DRAM products on new technologies, guiding projects from initial specifications through PPA-qualified library release. Collaborate with DTCO, Process, CMOS, and CAD teams to define stdcells architecture, negotiate verification needs, and ensure on-time delivery of high-quality block-level layouts. Perform layout verification (LVS/DRC/Latchup), quality checks, and documentation while using AI-assisted workflows to improve design productivity and reduce manual effort.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Design and maintain standard cells layout for new DRAM products on new technology.
  • •Lead stdcells layout projects from initial spec definition through PPA-qualified library release.
  • •Collaborate with DTCO team to develop stdcells architecture for emerging technologies.
  • •Perform layout verification (LVS/DRC/Latchup), quality checks, and documentation, ensuring acceptable quality.
  • •Guide junior team-members on sub block-level layouts and review their work; contribute to project management and deliver on-time outcomes.

Key Requirements

  • •Design and maintain standard cells layout for new DRAM products on new technology.
  • •Lead stdcells layout projects from initial spec definition through PPA-qualified library release.
  • •Perform layout verification (LVS/DRC/Latchup), quality checks, and documentation.
  • •Plan and execute project delivery by estimating area/time, scheduling, delegation, and meeting milestones.
  • •Closely collaborate with DTCO and other teams (Process, CMOS, CAD) on stdcells architecture for emerging technologies.
Skills:LeadershipProject planningCollaborationAttention to qualityDocumentation
Tech Stack:DRAMStandard cells (stdcells)LVSDRCLatchupCMOSCADPPA-qualified libraryAI toolsAI-assisted workflows

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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